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| author | Steffen Görtz <contrib@steffen-goertz.de> | 2019-02-01 10:33:55 +0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-02-01 15:31:26 +0000 |
| commit | c0d4eb83526e2ba5a8def0710d183a9387090ab6 (patch) | |
| tree | 3a5e68d08d3a583f3b2a1cd66e078f09aaac30b0 /memory_mapping.c | |
| parent | 1cf86a8618644beb860951ff4383457ee88a7f4a (diff) | |
| download | qemu-c0d4eb83526e2ba5a8def0710d183a9387090ab6.zip qemu-c0d4eb83526e2ba5a8def0710d183a9387090ab6.tar.gz qemu-c0d4eb83526e2ba5a8def0710d183a9387090ab6.tar.bz2 | |
hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
The nRF51 contains three regions of non-volatile memory (NVM):
- CODE (R/W): contains code
- FICR (R): Factory information like code size, chip id etc.
- UICR (R/W): Changeable configuration data. Lock bits, Code
protection configuration, Bootloader address, Nordic SoftRadio
configuration, Firmware configuration.
Read and write access to the memories is managed by the
Non-volatile memory controller.
Memory schema:
[ CPU ] -+- [ NVM, either FICR, UICR or CODE ]
| |
\- [ NVMC ]
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Tested-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190201023357.22596-2-stefanha@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'memory_mapping.c')
0 files changed, 0 insertions, 0 deletions