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authorRichard Henderson <richard.henderson@linaro.org>2020-08-19 22:37:40 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-09-01 07:41:38 -0700
commit6efd55995a224787baa712500b82ef21a148d38e (patch)
tree6d34b48064a7c5b6527062ac2725ca4185a34713 /linux-user
parent3e0e16ae1e0048a21a91674061ec9c43c5d7a76c (diff)
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target/microblaze: Fix width of ESR
The exception status register is only 32-bits wide. Do not use a 64-bit type to represent it. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user')
-rw-r--r--linux-user/microblaze/cpu_loop.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/linux-user/microblaze/cpu_loop.c b/linux-user/microblaze/cpu_loop.c
index da5e98b..3de99ea 100644
--- a/linux-user/microblaze/cpu_loop.c
+++ b/linux-user/microblaze/cpu_loop.c
@@ -106,7 +106,7 @@ void cpu_loop(CPUMBState *env)
queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
break;
default:
- fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n",
+ fprintf(stderr, "Unhandled hw-exception: 0x%x\n",
env->esr & ESR_EC_MASK);
cpu_dump_state(cs, stderr, 0);
exit(EXIT_FAILURE);