aboutsummaryrefslogtreecommitdiff
path: root/linux-user/main.c
diff options
context:
space:
mode:
authorBlue Swirl <blauwirbel@gmail.com>2011-05-14 11:55:30 +0000
committerBlue Swirl <blauwirbel@gmail.com>2011-05-22 10:47:28 +0000
commitdcfd14b3741983c466ad92fa2ae91eeafce3e5d5 (patch)
treee31a1c6d29bd6608b108ff72b68d90a80dad4a88 /linux-user/main.c
parent1fddfba129f5435c80eda14e8bc23fdb888c7187 (diff)
downloadqemu-dcfd14b3741983c466ad92fa2ae91eeafce3e5d5.zip
qemu-dcfd14b3741983c466ad92fa2ae91eeafce3e5d5.tar.gz
qemu-dcfd14b3741983c466ad92fa2ae91eeafce3e5d5.tar.bz2
Delete unused tb_invalidate_page_range
tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'linux-user/main.c')
-rw-r--r--linux-user/main.c22
1 files changed, 2 insertions, 20 deletions
diff --git a/linux-user/main.c b/linux-user/main.c
index a4996e7..8336639 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -455,24 +455,6 @@ void cpu_loop(CPUX86State *env)
#ifdef TARGET_ARM
-static void arm_cache_flush(abi_ulong start, abi_ulong last)
-{
- abi_ulong addr, last1;
-
- if (last < start)
- return;
- addr = start;
- for(;;) {
- last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
- if (last1 > last)
- last1 = last;
- tb_invalidate_page_range(addr, last1 + 1);
- if (last1 == last)
- break;
- addr = last1 + 1;
- }
-}
-
/* Handle a jump to the kernel code page. */
static int
do_kernel_trap(CPUARMState *env)
@@ -717,7 +699,7 @@ void cpu_loop(CPUARMState *env)
}
if (n == ARM_NR_cacheflush) {
- arm_cache_flush(env->regs[0], env->regs[1]);
+ /* nop */
} else if (n == ARM_NR_semihosting
|| n == ARM_NR_thumb_semihosting) {
env->regs[0] = do_arm_semihosting (env);
@@ -733,7 +715,7 @@ void cpu_loop(CPUARMState *env)
if ( n > ARM_NR_BASE) {
switch (n) {
case ARM_NR_cacheflush:
- arm_cache_flush(env->regs[0], env->regs[1]);
+ /* nop */
break;
case ARM_NR_set_tls:
cpu_set_tls(env, env->regs[0]);