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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2014-11-17 19:28:18 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-11-18 11:24:31 +0000 |
| commit | 444b1996cb3769d8636b223c281fb09ab89b7a31 (patch) | |
| tree | 016828095e3c111100a89797e3b7a8cb2d944151 /linux-headers/asm-powerpc | |
| parent | f874bf905ff2f8dcc17acbfc61e49a92a6f4d04b (diff) | |
| download | qemu-444b1996cb3769d8636b223c281fb09ab89b7a31.zip qemu-444b1996cb3769d8636b223c281fb09ab89b7a31.tar.gz qemu-444b1996cb3769d8636b223c281fb09ab89b7a31.tar.bz2 | |
linux-headers: update to 3.18-rc5
This updates the Linux header to version 3.18-rc5, adding support for
(among other things) read-only memslots on ARM and arm64.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Message-id: 1416248898-6302-1-git-send-email-ard.biesheuvel@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'linux-headers/asm-powerpc')
| -rw-r--r-- | linux-headers/asm-powerpc/kvm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kvm.h index e0e49db..ab4d473 100644 --- a/linux-headers/asm-powerpc/kvm.h +++ b/linux-headers/asm-powerpc/kvm.h @@ -476,6 +476,11 @@ struct kvm_get_htab_header { /* FP and vector status/control registers */ #define KVM_REG_PPC_FPSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x80) +/* + * VSCR register is documented as a 32-bit register in the ISA, but it can + * only be accesses via a vector register. Expose VSCR as a 32-bit register + * even though the kernel represents it as a 128-bit vector. + */ #define KVM_REG_PPC_VSCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x81) /* Virtual processor areas */ @@ -557,6 +562,7 @@ struct kvm_get_htab_header { #define KVM_REG_PPC_DABRX (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8) #define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9) #define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba) +#define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs |