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| author | Yifei Jiang <jiangyifei@huawei.com> | 2022-01-12 16:13:22 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:56 +1000 |
| commit | ad40be27084536408b47a9209181f776ec2c54a5 (patch) | |
| tree | c6107ad96cf9f20242e17b6668f99d1a7707f9f6 /include | |
| parent | 9997cc1e19d1f909551783c280cfe441a0838943 (diff) | |
| download | qemu-ad40be27084536408b47a9209181f776ec2c54a5.zip qemu-ad40be27084536408b47a9209181f776ec2c54a5.tar.gz qemu-ad40be27084536408b47a9209181f776ec2c54a5.tar.bz2 | |
target/riscv: Support start kernel directly by KVM
Get kernel and fdt start address in virt.c, and pass them to KVM
when cpu reset. Add kvm_riscv.h to place riscv specific interface.
In addition, PLIC is created without M-mode PLIC contexts when KVM
is enabled.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Message-id: 20220112081329.1835-7-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/riscv/boot.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index baff11d..5834c23 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -58,5 +58,6 @@ void riscv_rom_copy_firmware_info(MachineState *machine, hwaddr rom_base, hwaddr rom_size, uint32_t reset_vec_size, uint64_t kernel_entry); +void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr); #endif /* RISCV_BOOT_H */ |