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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-05-04 10:16:52 +0200 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2020-06-22 18:37:12 +0200 |
| commit | 95f4dc444a99ea91534b4ac9237bdec3b2581588 (patch) | |
| tree | 686ccb52dd6720a15beb8b91e728433fc227983a /include | |
| parent | ba2afd0eb2c5ca0b23feb347369660d0577c225f (diff) | |
| download | qemu-95f4dc444a99ea91534b4ac9237bdec3b2581588.zip qemu-95f4dc444a99ea91534b4ac9237bdec3b2581588.tar.gz qemu-95f4dc444a99ea91534b4ac9237bdec3b2581588.tar.bz2 | |
hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'
Extract timer definitions to 'hw/timer/tmu012.h'.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/sh4/sh.h | 9 | ||||
| -rw-r--r-- | include/hw/timer/tmu012.h | 23 |
2 files changed, 23 insertions, 9 deletions
diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h index fe773cb..93f464b 100644 --- a/include/hw/sh4/sh.h +++ b/include/hw/sh4/sh.h @@ -27,15 +27,6 @@ typedef struct { int sh7750_register_io_device(struct SH7750State *s, sh7750_io_device * device); -/* sh_timer.c */ -#define TMU012_FEAT_TOCR (1 << 0) -#define TMU012_FEAT_3CHAN (1 << 1) -#define TMU012_FEAT_EXTCLK (1 << 2) -void tmu012_init(MemoryRegion *sysmem, hwaddr base, - int feat, uint32_t freq, - qemu_irq ch0_irq, qemu_irq ch1_irq, - qemu_irq ch2_irq0, qemu_irq ch2_irq1); - /* sh_serial.c */ #define SH_SERIAL_FEAT_SCIF (1 << 0) diff --git a/include/hw/timer/tmu012.h b/include/hw/timer/tmu012.h new file mode 100644 index 0000000..808ed8d --- /dev/null +++ b/include/hw/timer/tmu012.h @@ -0,0 +1,23 @@ +/* + * SuperH Timer + * + * Copyright (c) 2007 Magnus Damm + * + * This code is licensed under the GPL. + */ + +#ifndef HW_TIMER_TMU012_H +#define HW_TIMER_TMU012_H + +#include "exec/hwaddr.h" + +#define TMU012_FEAT_TOCR (1 << 0) +#define TMU012_FEAT_3CHAN (1 << 1) +#define TMU012_FEAT_EXTCLK (1 << 2) + +void tmu012_init(MemoryRegion *sysmem, hwaddr base, + int feat, uint32_t freq, + qemu_irq ch0_irq, qemu_irq ch1_irq, + qemu_irq ch2_irq0, qemu_irq ch2_irq1); + +#endif |