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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-02-01 14:55:44 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-02-01 14:55:44 +0000 |
| commit | e1f220811dbd5d85fb02ff286358f9ee6188938f (patch) | |
| tree | 8a5fd70fcce087c4c4e849f461e521aebf2bedbc /include | |
| parent | a80c4256543987ca88407349ee012a673a10a2ae (diff) | |
| download | qemu-e1f220811dbd5d85fb02ff286358f9ee6188938f.zip qemu-e1f220811dbd5d85fb02ff286358f9ee6188938f.tar.gz qemu-e1f220811dbd5d85fb02ff286358f9ee6188938f.tar.bz2 | |
target/arm/translate-a64: Don't underdecode SIMD ld/st multiple
In the AdvSIMD load/store multiple structures encodings,
the non-post-indexed case should have zeroes in [20:16]
(which is the Rm field for the post-indexed case).
Correctly UNDEF the currently unallocated encodings which
have non-zeroes in those bits.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Message-id: 20190125182626.9221-4-peter.maydell@linaro.org
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions