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| author | Andreas Färber <afaerber@suse.de> | 2013-08-27 00:28:06 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:20:47 +0100 |
| commit | d5a11fefef1eeed86a8f06021067ba9990729a5a (patch) | |
| tree | 7a99e0676de042609104c21d98ff2a94be017c9a /include | |
| parent | f0c3c505a8ec1a948006b3a16a35864a2270a84b (diff) | |
| download | qemu-d5a11fefef1eeed86a8f06021067ba9990729a5a.zip qemu-d5a11fefef1eeed86a8f06021067ba9990729a5a.tar.gz qemu-d5a11fefef1eeed86a8f06021067ba9990729a5a.tar.bz2 | |
exec: Change tlb_fill() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/exec/exec-all.h | 2 | ||||
| -rw-r--r-- | include/exec/softmmu_template.h | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 2179329..c8c3a11 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -332,7 +332,7 @@ bool io_mem_read(struct MemoryRegion *mr, hwaddr addr, bool io_mem_write(struct MemoryRegion *mr, hwaddr addr, uint64_t value, unsigned size); -void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int mmu_idx, +void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr); uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h index ac825d2..8603933 100644 --- a/include/exec/softmmu_template.h +++ b/include/exec/softmmu_template.h @@ -158,7 +158,7 @@ WORD_TYPE helper_le_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx, do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr); tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; } @@ -240,7 +240,7 @@ WORD_TYPE helper_be_ld_name(CPUArchState *env, target_ulong addr, int mmu_idx, do_unaligned_access(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, READ_ACCESS_TYPE, mmu_idx, retaddr); tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; } @@ -360,7 +360,7 @@ void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, do_unaligned_access(env, addr, 1, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, 1, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr); tlb_addr = env->tlb_table[mmu_idx][index].addr_write; } @@ -436,7 +436,7 @@ void helper_be_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val, do_unaligned_access(env, addr, 1, mmu_idx, retaddr); } #endif - tlb_fill(env, addr, 1, mmu_idx, retaddr); + tlb_fill(ENV_GET_CPU(env), addr, 1, mmu_idx, retaddr); tlb_addr = env->tlb_table[mmu_idx][index].addr_write; } |