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authorPeter Maydell <peter.maydell@linaro.org>2017-01-20 11:15:08 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-01-20 11:15:08 +0000
commitb53db42bc0140a32e5196125b216a82d08992a7d (patch)
tree955ba2ea861f7add661cfb67b00795c13db51736 /include
parentebfcc03bf73548d3c8456e441a00b09c1e8f0976 (diff)
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hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ
Augment the GICv3's QOM device interface by adding two new sets of sysbus IRQ lines, to signal VIRQ and VFIQ to each CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-2-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include')
-rw-r--r--include/hw/intc/arm_gicv3_common.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h
index 341a311..beb2c77 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -145,6 +145,8 @@ struct GICv3CPUState {
CPUState *cpu;
qemu_irq parent_irq;
qemu_irq parent_fiq;
+ qemu_irq parent_virq;
+ qemu_irq parent_vfiq;
/* Redistributor */
uint32_t level; /* Current IRQ level */