diff options
| author | Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> | 2017-08-03 02:35:26 +0200 |
|---|---|---|
| committer | Cornelia Huck <cohuck@redhat.com> | 2017-08-30 18:23:25 +0200 |
| commit | 808e668bbc8db6faa9ffaa802628711f36fe659b (patch) | |
| tree | e35579e4c8bf5229ea644ddb78bb0ac25c1cc67f /include | |
| parent | 1ab5eb4efb91a3d4569b0df6e824cc08ab4bd8ec (diff) | |
| download | qemu-808e668bbc8db6faa9ffaa802628711f36fe659b.zip qemu-808e668bbc8db6faa9ffaa802628711f36fe659b.tar.gz qemu-808e668bbc8db6faa9ffaa802628711f36fe659b.tar.bz2 | |
s390x/css: use macro for event-information pending error recover code
Let's use a macro for the ERC (error recover code) when generating a
Channel Subsystem Event-information pending CRW (channel report word).
While we are at it, let's also add all other ERCs.
Signed-off-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20170803003527.86979-2-bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/s390x/ioinst.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/include/hw/s390x/ioinst.h b/include/hw/s390x/ioinst.h index 92d1565..5f2db69 100644 --- a/include/hw/s390x/ioinst.h +++ b/include/hw/s390x/ioinst.h @@ -201,8 +201,16 @@ typedef struct CRW { #define CRW_FLAGS_MASK_A 0x0080 #define CRW_FLAGS_MASK_ERC 0x003f -#define CRW_ERC_INIT 0x02 -#define CRW_ERC_IPI 0x04 +#define CRW_ERC_EVENT 0x00 /* event information pending */ +#define CRW_ERC_AVAIL 0x01 /* available */ +#define CRW_ERC_INIT 0x02 /* initialized */ +#define CRW_ERC_TERROR 0x03 /* temporary error */ +#define CRW_ERC_IPI 0x04 /* installed parm initialized */ +#define CRW_ERC_TERM 0x05 /* terminal */ +#define CRW_ERC_PERRN 0x06 /* perm. error, facility not init */ +#define CRW_ERC_PERRI 0x07 /* perm. error, facility init */ +#define CRW_ERC_PMOD 0x08 /* installed parameters modified */ +#define CRW_ERC_IPR 0x0A /* installed parameters restored */ #define CRW_RSC_SUBCH 0x3 #define CRW_RSC_CHP 0x4 |