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authorBen Widawsky <ben.widawsky@intel.com>2022-04-29 15:40:45 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-05-13 06:13:36 -0400
commit639daf8e93bcf266d0518eecbcfe12d26644a0a9 (patch)
tree7c175f7dfffee622b0172c7208ee39230937bb55 /include
parent092c6b11f2ab835f50b3167d0559c197a21a051e (diff)
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hw/cxl/device: Plumb real Label Storage Area (LSA) sizing
This should introduce no change. Subsequent work will make use of this new class member. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220429144110.25167-21-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/cxl/cxl_device.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index d8da2c7..ea2571a 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -236,6 +236,7 @@ struct CXLType3Dev {
/* Properties */
HostMemoryBackend *hostmem;
+ HostMemoryBackend *lsa;
/* State */
CXLComponentState cxl_cstate;
@@ -243,6 +244,14 @@ struct CXLType3Dev {
};
#define TYPE_CXL_TYPE3 "cxl-type3"
-OBJECT_DECLARE_SIMPLE_TYPE(CXLType3Dev, CXL_TYPE3)
+OBJECT_DECLARE_TYPE(CXLType3Dev, CXLType3Class, CXL_TYPE3)
+
+struct CXLType3Class {
+ /* Private */
+ PCIDeviceClass parent_class;
+
+ /* public */
+ uint64_t (*get_lsa_size)(CXLType3Dev *ct3d);
+};
#endif