diff options
author | Bin Meng <bin.meng@windriver.com> | 2020-09-03 18:40:15 +0800 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2020-09-09 15:54:19 -0700 |
commit | 4921a0ce86cecd03e6918832673db79de62e6fe1 (patch) | |
tree | 5da8decc3b08809b7f5fdaddedb25d5e43fd8166 /include | |
parent | 0fa9e329454aaccc6dbb6a4f52ad0c88a060a3b6 (diff) | |
download | qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.zip qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.tar.gz qemu-4921a0ce86cecd03e6918832673db79de62e6fe1.tar.bz2 |
hw/riscv: Move sifive_gpio model to hw/gpio
This is an effort to clean up the hw/riscv directory. Ideally it
should only contain the RISC-V SoC / machine codes plus generic
codes. Let's move sifive_gpio model to hw/gpio directory.
Note this also removes the trace-events in the hw/riscv directory,
since gpio is the only supported trace target in that directory.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1599129623-68957-5-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/gpio/sifive_gpio.h (renamed from include/hw/riscv/sifive_gpio.h) | 0 | ||||
-rw-r--r-- | include/hw/riscv/sifive_e.h | 2 | ||||
-rw-r--r-- | include/hw/riscv/sifive_u.h | 2 |
3 files changed, 2 insertions, 2 deletions
diff --git a/include/hw/riscv/sifive_gpio.h b/include/hw/gpio/sifive_gpio.h index cf12fcf..cf12fcf 100644 --- a/include/hw/riscv/sifive_gpio.h +++ b/include/hw/gpio/sifive_gpio.h diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h index 6374141..b140084 100644 --- a/include/hw/riscv/sifive_e.h +++ b/include/hw/riscv/sifive_e.h @@ -21,7 +21,7 @@ #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_cpu.h" -#include "hw/riscv/sifive_gpio.h" +#include "hw/gpio/sifive_gpio.h" #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" #define RISCV_E_SOC(obj) \ diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 936a3bd..fe5c580 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -23,7 +23,7 @@ #include "hw/net/cadence_gem.h" #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_cpu.h" -#include "hw/riscv/sifive_gpio.h" +#include "hw/gpio/sifive_gpio.h" #include "hw/misc/sifive_u_otp.h" #include "hw/misc/sifive_u_prci.h" |