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authorJean-Philippe Brucker <jean-philippe@linaro.org>2022-04-27 12:15:43 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-04-28 13:57:33 +0100
commitced716942a6646594f23674a9462bfe98c29e2e9 (patch)
treeef62b0a0c83fe32a496d6b871e9a18c2df0dcbcb /include
parent8b7a5bbecff7d2128ddf81fe9886692c820b742e (diff)
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hw/arm/smmuv3: Cache event fault record
The Record bit in the Context Descriptor tells the SMMU to report fault events to the event queue. Since we don't cache the Record bit at the moment, access faults from a cached Context Descriptor are never reported. Store the Record bit in the cached SMMUTransCfg. Fixes: 9bde7f0674fe ("hw/arm/smmuv3: Implement translate callback") Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20220427111543.124620-1-jean-philippe@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/smmu-common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index 706be3c..21e6234 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -71,6 +71,7 @@ typedef struct SMMUTransCfg {
bool disabled; /* smmu is disabled */
bool bypassed; /* translation is bypassed */
bool aborted; /* translation is aborted */
+ bool record_faults; /* record fault events */
uint64_t ttb; /* TT base address */
uint8_t oas; /* output address width */
uint8_t tbi; /* Top Byte Ignore */