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author | Bernhard Beschow <shentey@gmail.com> | 2022-09-22 09:52:32 +0200 |
---|---|---|
committer | Alistair Francis <alistair@alistair23.me> | 2022-09-27 07:04:38 +1000 |
commit | 9dfa6c2aec299fda9946c327e889087365a715b5 (patch) | |
tree | 4cd5dd763a5e45d2df9e443e8a462e5d8af31b0f /include | |
parent | 9e37653b5c73d8e43013ed78ee9d7644f23d146c (diff) | |
download | qemu-9dfa6c2aec299fda9946c327e889087365a715b5.zip qemu-9dfa6c2aec299fda9946c327e889087365a715b5.tar.gz qemu-9dfa6c2aec299fda9946c327e889087365a715b5.tar.bz2 |
hw/riscv/sifive_e: Fix inheritance of SiFiveEState
SiFiveEState inherits from SysBusDevice while it's TypeInfo claims it to
inherit from TYPE_MACHINE. This is an inconsistency which can cause
undefined behavior such as memory corruption.
Change SiFiveEState to inherit from MachineState since it is registered
as a machine.
Fixes: 0869490b1c ("riscv: sifive_e: Manually define the machine")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220922075232.33653-1-shentey@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/riscv/sifive_e.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/hw/riscv/sifive_e.h b/include/hw/riscv/sifive_e.h index 83604da..d738745 100644 --- a/include/hw/riscv/sifive_e.h +++ b/include/hw/riscv/sifive_e.h @@ -22,6 +22,7 @@ #include "hw/riscv/riscv_hart.h" #include "hw/riscv/sifive_cpu.h" #include "hw/gpio/sifive_gpio.h" +#include "hw/boards.h" #define TYPE_RISCV_E_SOC "riscv.sifive.e.soc" #define RISCV_E_SOC(obj) \ @@ -41,7 +42,7 @@ typedef struct SiFiveESoCState { typedef struct SiFiveEState { /*< private >*/ - SysBusDevice parent_obj; + MachineState parent_obj; /*< public >*/ SiFiveESoCState soc; |