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| author | Atish Patra <atish.patra@wdc.com> | 2020-07-01 11:39:47 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2020-07-13 17:25:37 -0700 |
| commit | 66b1205bc5ab8bb3f5e12fa4155bbeb56e6724e9 (patch) | |
| tree | ae9c0df216dda16062dfd1a7b598fc7d02d4d803 /include | |
| parent | 43cf723adca9a5e188c664c3b606a585192a599c (diff) | |
| download | qemu-66b1205bc5ab8bb3f5e12fa4155bbeb56e6724e9.zip qemu-66b1205bc5ab8bb3f5e12fa4155bbeb56e6724e9.tar.gz qemu-66b1205bc5ab8bb3f5e12fa4155bbeb56e6724e9.tar.bz2 | |
RISC-V: Copy the fdt in dram instead of ROM
Currently, the fdt is copied to the ROM after the reset vector. The firmware
has to copy it to DRAM. Instead of this, directly copy the device tree to a
pre-computed dram address. The device tree load address should be as far as
possible from kernel and initrd images. That's why it is kept at the end of
the DRAM or 4GB whichever is lesser.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20200701183949.398134-3-atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/riscv/boot.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 3e9759c..35b6ddf 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -35,7 +35,9 @@ target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb); hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size, uint64_t kernel_entry, hwaddr *start); +uint32_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt); void riscv_setup_rom_reset_vec(hwaddr saddr, hwaddr rom_base, - hwaddr rom_size, void *fdt); + hwaddr rom_size, + uint32_t fdt_load_addr, void *fdt); #endif /* RISCV_BOOT_H */ |