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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2021-12-13 11:06:07 +0100
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>2022-03-07 20:34:17 +0100
commit5e0c126aada959f1474ab633931e22d92869c44f (patch)
tree49f055afb40b8d33191bf0649730becb9768acdc /include
parentc8aeab3a09b51f828eaa50b994434dbfb3f626b8 (diff)
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target/mips: Remove duplicated MIPSCPU::cp0_count_rate
Since the previous commit 9ea89876f9d ("target/mips: Fix cycle counter timing calculations"), MIPSCPU::cp0_count_rate is not used anymore. We don't need it since it is already expressed as mips_def_t::CCRes. Remove the duplicate and clean. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <>20211213102340.1847248-1-f4bug@amsat.org>
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