diff options
author | Cédric Le Goater <clg@kaod.org> | 2019-12-05 19:44:51 +0100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2019-12-17 10:39:48 +1100 |
commit | 2b548a4255ca07cf4d467b7fb3bdf2ab79b7dff5 (patch) | |
tree | cfb8f185a3887bb832f734af3a903c514491fd63 /include | |
parent | 7d37b274ffd382d1d9e46164eca557b5f87383aa (diff) | |
download | qemu-2b548a4255ca07cf4d467b7fb3bdf2ab79b7dff5.zip qemu-2b548a4255ca07cf4d467b7fb3bdf2ab79b7dff5.tar.gz qemu-2b548a4255ca07cf4d467b7fb3bdf2ab79b7dff5.tar.bz2 |
ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine
This is an empty shell with the XSCOM bus and cores. The chip controllers
will come later.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191205184454.10722-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/ppc/pnv.h | 33 | ||||
-rw-r--r-- | include/hw/ppc/pnv_xscom.h | 19 |
2 files changed, 52 insertions, 0 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 3a7bc3c..bfa61ed 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -43,6 +43,7 @@ typedef enum PnvChipType { PNV_CHIP_POWER8, /* AKA Venice */ PNV_CHIP_POWER8NVL, /* AKA Naples */ PNV_CHIP_POWER9, /* AKA Nimbus */ + PNV_CHIP_POWER10, /* AKA TBD */ } PnvChipType; typedef struct PnvChip { @@ -105,6 +106,14 @@ typedef struct Pnv9Chip { #define PNV9_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf) #define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f) +#define TYPE_PNV10_CHIP "pnv10-chip" +#define PNV10_CHIP(obj) OBJECT_CHECK(Pnv10Chip, (obj), TYPE_PNV10_CHIP) + +typedef struct Pnv10Chip { + /*< private >*/ + PnvChip parent_obj; +} Pnv10Chip; + typedef struct PnvChipClass { /*< private >*/ SysBusDeviceClass parent_class; @@ -144,6 +153,10 @@ typedef struct PnvChipClass { #define PNV_CHIP_POWER9(obj) \ OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9) +#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0") +#define PNV_CHIP_POWER10(obj) \ + OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER10) + /* * This generates a HW chip id depending on an index, as found on a * two socket system with dual chip modules : @@ -203,6 +216,16 @@ PnvChip *pnv_get_chip(uint32_t chip_id); #define PNV_FDT_ADDR 0x01000000 #define PNV_TIMEBASE_FREQ 512000000ULL +static inline bool pnv_chip_is_power10(const PnvChip *chip) +{ + return PNV_CHIP_GET_CLASS(chip)->chip_type == PNV_CHIP_POWER10; +} + +static inline bool pnv_is_power10(PnvMachineState *pnv) +{ + return pnv_chip_is_power10(pnv->chips[0]); +} + /* * BMC helpers */ @@ -293,4 +316,14 @@ IPMIBmc *pnv_bmc_create(void); #define PNV9_HOMER_SIZE 0x0000000000300000ull #define PNV9_HOMER_BASE(chip) \ (0x203ffd800000ull + ((uint64_t)PNV_CHIP_INDEX(chip)) * PNV9_HOMER_SIZE) + +/* + * POWER10 MMIO base addresses - 16TB stride per chip + */ +#define PNV10_CHIP_BASE(chip, base) \ + ((base) + ((uint64_t) (chip)->chip_id << 44)) + +#define PNV10_XSCOM_SIZE 0x0000000400000000ull +#define PNV10_XSCOM_BASE(chip) PNV10_CHIP_BASE(chip, 0x00603fc00000000ull) + #endif /* PPC_PNV_H */ diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 67641ed..790eb3d 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -70,6 +70,9 @@ typedef struct PnvXScomInterfaceClass { #define PNV_XSCOM_OCC_BASE 0x0066000 #define PNV_XSCOM_OCC_SIZE 0x6000 +/* + * Layout of the XSCOM PCB addresses (POWER 9) + */ #define PNV9_XSCOM_EC_BASE(core) \ ((uint64_t)(((core) & 0x1F) + 0x20) << 24) #define PNV9_XSCOM_EC_SIZE 0x100000 @@ -87,6 +90,22 @@ typedef struct PnvXScomInterfaceClass { #define PNV9_XSCOM_XIVE_BASE 0x5013000 #define PNV9_XSCOM_XIVE_SIZE 0x300 +/* + * Layout of the XSCOM PCB addresses (POWER 10) + */ +#define PNV10_XSCOM_EQ_CHIPLET(core) (0x20 + ((core) >> 2)) +#define PNV10_XSCOM_EQ(chiplet) ((chiplet) << 24) +#define PNV10_XSCOM_EC(proc) \ + ((0x2 << 16) | ((1 << (3 - (proc))) << 12)) + +#define PNV10_XSCOM_EQ_BASE(core) \ + ((uint64_t) PNV10_XSCOM_EQ(PNV10_XSCOM_EQ_CHIPLET(core))) +#define PNV10_XSCOM_EQ_SIZE 0x100000 + +#define PNV10_XSCOM_EC_BASE(core) \ + ((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3)) +#define PNV10_XSCOM_EC_SIZE 0x100000 + extern void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset); |