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authorCédric Le Goater <clg@kaod.org>2019-01-29 11:46:05 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-01-29 11:46:05 +0000
commitf95c4bffdc4c53b29f89762cab4adc5a43f95daf (patch)
tree9adeee6804f0e7b836a8d22908893d46024e04ad /include
parent9149af2a2d3609507959bb17b74a35c3cebc5f66 (diff)
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aspeed/smc: snoop SPI transfers to fake dummy cycles
The m25p80 models dummy cycles using byte transfers. This works well when the transfers are initiated by the QEMU model of a SPI controller but when these are initiated by the OS, it breaks emulation. Snoop the SPI transfer to catch commands requiring dummy cycles and replace them with byte transfers compatible with the m25p80 model. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Message-id: 20190124140519.13838-5-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ssi/aspeed_smc.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 1f55731..3b1e7fc 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -98,6 +98,9 @@ typedef struct AspeedSMCState {
uint8_t conf_enable_w0;
AspeedSMCFlash *flashes;
+
+ uint8_t snoop_index;
+ uint8_t snoop_dummies;
} AspeedSMCState;
#endif /* ASPEED_SMC_H */