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author | Peter Maydell <peter.maydell@linaro.org> | 2015-03-11 08:44:59 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-03-11 08:44:59 +0000 |
commit | 4ba4df405c766b7f9e46ef145e140961155348e6 (patch) | |
tree | f08ade10e3f16a0cd90c8f68ed5c99546851d5c7 /include | |
parent | 21025c29f5cc716cea8a8865d96fa259acbd4d47 (diff) | |
parent | f3b18f35a23c60edbda6420cd4bd30b8bb11ea80 (diff) | |
download | qemu-4ba4df405c766b7f9e46ef145e140961155348e6.zip qemu-4ba4df405c766b7f9e46ef145e140961155348e6.tar.gz qemu-4ba4df405c766b7f9e46ef145e140961155348e6.tar.bz2 |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update
# gpg: Signature made Tue Mar 10 13:39:51 2015 GMT using RSA key ID AE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
* remotes/mcayland/tags/qemu-sparc-signed:
sun4u: switch m48t59 NVRAM to MMIO access
MAINTAINERS: add myself as SPARC maintainer
doc: minor updates to SPARC32 and SPARC64 documentation
m48t59: add m48t59 sysbus device
m48t59: introduce new base-year qdev property
m48t59: let init functions return a Nvram object
m48t59: add a Nvram interface
m48t59: register a QOM type for each nvram type we support
m48t59: move ISA ports/memory regions registration to QOM constructor
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/timer/m48t59.h | 61 |
1 files changed, 29 insertions, 32 deletions
diff --git a/include/hw/timer/m48t59.h b/include/hw/timer/m48t59.h index 8217522..3367923 100644 --- a/include/hw/timer/m48t59.h +++ b/include/hw/timer/m48t59.h @@ -1,37 +1,34 @@ #ifndef NVRAM_H #define NVRAM_H -/* NVRAM helpers */ -typedef uint32_t (*nvram_read_t)(void *private, uint32_t addr); -typedef void (*nvram_write_t)(void *private, uint32_t addr, uint32_t val); -typedef struct nvram_t { - void *opaque; - nvram_read_t read_fn; - nvram_write_t write_fn; -} nvram_t; - -uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr); -int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max); - -int PPC_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size, - const char *arch, - uint32_t RAM_size, int boot_device, - uint32_t kernel_image, uint32_t kernel_size, - const char *cmdline, - uint32_t initrd_image, uint32_t initrd_size, - uint32_t NVRAM_image, - int width, int height, int depth); - -#define TYPE_SYSBUS_M48T59 "m48t59" - -typedef struct M48t59State M48t59State; - -void m48t59_write (void *private, uint32_t addr, uint32_t val); -uint32_t m48t59_read (void *private, uint32_t addr); -void m48t59_toggle_lock (void *private, int lock); -M48t59State *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, - int type); -M48t59State *m48t59_init(qemu_irq IRQ, hwaddr mem_base, - uint32_t io_base, uint16_t size, int type); +#include "qemu-common.h" +#include "qom/object.h" + +#define TYPE_NVRAM "nvram" + +#define NVRAM_CLASS(klass) \ + OBJECT_CLASS_CHECK(NvramClass, (klass), TYPE_NVRAM) +#define NVRAM_GET_CLASS(obj) \ + OBJECT_GET_CLASS(NvramClass, (obj), TYPE_NVRAM) +#define NVRAM(obj) \ + INTERFACE_CHECK(Nvram, (obj), TYPE_NVRAM) + +typedef struct Nvram { + Object parent; +} Nvram; + +typedef struct NvramClass { + InterfaceClass parent; + + uint32_t (*read)(Nvram *obj, uint32_t addr); + void (*write)(Nvram *obj, uint32_t addr, uint32_t val); + void (*toggle_lock)(Nvram *obj, int lock); +} NvramClass; + +Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size, + int base_year, int type); +Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base, + uint32_t io_base, uint16_t size, int base_year, + int type); #endif /* !NVRAM_H */ |