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| author | Joel Stanley <joel@jms.id.au> | 2022-02-18 09:18:10 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-02-26 18:40:51 +0100 |
| commit | e1acf581c9eb4e59e794fd6137986edd8a4406c0 (patch) | |
| tree | d51352ef20d28dd39f1651559915f04594f9fcdd /include | |
| parent | 50f97a0ec6e81b8713c2e3868e8b1a0f8a44b82f (diff) | |
| download | qemu-e1acf581c9eb4e59e794fd6137986edd8a4406c0.zip qemu-e1acf581c9eb4e59e794fd6137986edd8a4406c0.tar.gz qemu-e1acf581c9eb4e59e794fd6137986edd8a4406c0.tar.bz2 | |
ast2600: Add Secure Boot Controller model
Just a stub that indicates the system has booted in secure boot mode.
Used for testing the driver:
https://lore.kernel.org/all/20211019080608.283324-1-joel@jms.id.au/
Signed-off-by: Joel Stanley <joel@jms.id.au>
[ clg: - Fixed typo
- Adjusted Copyright dates ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 3 | ||||
| -rw-r--r-- | include/hw/misc/aspeed_sbc.h | 32 |
2 files changed, 35 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index cae9906..da043dc 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -24,6 +24,7 @@ #include "hw/misc/aspeed_i3c.h" #include "hw/ssi/aspeed_smc.h" #include "hw/misc/aspeed_hace.h" +#include "hw/misc/aspeed_sbc.h" #include "hw/watchdog/wdt_aspeed.h" #include "hw/net/ftgmac100.h" #include "target/arm/cpu.h" @@ -60,6 +61,7 @@ struct AspeedSoCState { AspeedSMCState fmc; AspeedSMCState spi[ASPEED_SPIS_NUM]; EHCISysBusState ehci[ASPEED_EHCIS_NUM]; + AspeedSBCState sbc; AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; @@ -109,6 +111,7 @@ enum { ASPEED_DEV_SDMC, ASPEED_DEV_SCU, ASPEED_DEV_ADC, + ASPEED_DEV_SBC, ASPEED_DEV_VIDEO, ASPEED_DEV_SRAM, ASPEED_DEV_SDHCI, diff --git a/include/hw/misc/aspeed_sbc.h b/include/hw/misc/aspeed_sbc.h new file mode 100644 index 0000000..651747e --- /dev/null +++ b/include/hw/misc/aspeed_sbc.h @@ -0,0 +1,32 @@ +/* + * ASPEED Secure Boot Controller + * + * Copyright (C) 2021-2022 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef ASPEED_SBC_H +#define ASPEED_SBC_H + +#include "hw/sysbus.h" + +#define TYPE_ASPEED_SBC "aspeed.sbc" +#define TYPE_ASPEED_AST2600_SBC TYPE_ASPEED_SBC "-ast2600" +OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC) + +#define ASPEED_SBC_NR_REGS (0x93c >> 2) + +struct AspeedSBCState { + SysBusDevice parent; + + MemoryRegion iomem; + + uint32_t regs[ASPEED_SBC_NR_REGS]; +}; + +struct AspeedSBCClass { + SysBusDeviceClass parent_class; +}; + +#endif /* _ASPEED_SBC_H_ */ |