diff options
author | Cédric Le Goater <clg@kaod.org> | 2018-01-15 19:04:04 +0100 |
---|---|---|
committer | David Gibson <david@gibson.dropbear.id.au> | 2018-01-17 09:35:24 +1100 |
commit | c035851ac0584e1491f6d0fa28d92a8c7a872362 (patch) | |
tree | 2211f3edf3928fe127f1f40a9b21732083feaa82 /include | |
parent | b3b066e9d8640a5d143cf9241e00160f30d9a89d (diff) | |
download | qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.zip qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.tar.gz qemu-c035851ac0584e1491f6d0fa28d92a8c7a872362.tar.bz2 |
ppc/pnv: fix XSCOM core addressing on POWER9
The XSCOM base address of the core chiplet was wrongly calculated. Use
the OPAL macros to fix that and do a couple of renames.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/ppc/pnv.h | 1 | ||||
-rw-r--r-- | include/hw/ppc/pnv_xscom.h | 13 |
2 files changed, 11 insertions, 3 deletions
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index f023f1e..9075924 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -74,7 +74,6 @@ typedef struct PnvChipClass { uint64_t cores_mask; hwaddr xscom_base; - hwaddr xscom_core_base; uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id); } PnvChipClass; diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 7252e21..fb1bd5d 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -21,6 +21,8 @@ #include "qom/object.h" +typedef struct PnvChip PnvChip; + typedef struct PnvXScomInterface { Object parent; } PnvXScomInterface; @@ -54,8 +56,15 @@ typedef struct PnvXScomInterfaceClass { * PCB SLAVE 0x110Fxxxx */ -#define PNV_XSCOM_EX_CORE_BASE(base, i) ((base) | ((uint64_t)(i) << 24)) -#define PNV_XSCOM_EX_CORE_SIZE 0x100000 +#define PNV_XSCOM_EX_CORE_BASE 0x10000000ull + +#define PNV_XSCOM_EX_BASE(core) \ + (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24)) +#define PNV_XSCOM_EX_SIZE 0x100000 + +#define PNV_XSCOM_P9_EC_BASE(core) \ + ((uint64_t)(((core) & 0x1F) + 0x20) << 24) +#define PNV_XSCOM_P9_EC_SIZE 0x100000 #define PNV_XSCOM_LPC_BASE 0xb0020 #define PNV_XSCOM_LPC_SIZE 0x4 |