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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2015-06-19 14:17:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-06-19 14:17:45 +0100 |
| commit | b58850e79d8df1185bd4999df81fbe6954cd2790 (patch) | |
| tree | b45ea38f113b6c245b5ccb09743d981cc9152b2a /include | |
| parent | 6396a193d36e10ff38f26d4ef785aba97362f29e (diff) | |
| download | qemu-b58850e79d8df1185bd4999df81fbe6954cd2790.zip qemu-b58850e79d8df1185bd4999df81fbe6954cd2790.tar.gz qemu-b58850e79d8df1185bd4999df81fbe6954cd2790.tar.bz2 | |
arm: xlnx-zynqmp: Add 2xCortexR5 CPUs
Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset
(this is true of real hardware) by default or selectable as the boot
processor.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: da34128c73ca13fc4f8c3293e1a33d1e1e345655.1434501320.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/xlnx-zynqmp.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h index 4f14a22..c379632 100644 --- a/include/hw/arm/xlnx-zynqmp.h +++ b/include/hw/arm/xlnx-zynqmp.h @@ -28,6 +28,7 @@ TYPE_XLNX_ZYNQMP) #define XLNX_ZYNQMP_NUM_APU_CPUS 4 +#define XLNX_ZYNQMP_NUM_RPU_CPUS 2 #define XLNX_ZYNQMP_NUM_GEMS 4 #define XLNX_ZYNQMP_NUM_UARTS 2 @@ -48,6 +49,7 @@ typedef struct XlnxZynqMPState { /*< public >*/ ARMCPU apu_cpu[XLNX_ZYNQMP_NUM_APU_CPUS]; + ARMCPU rpu_cpu[XLNX_ZYNQMP_NUM_RPU_CPUS]; GICState gic; MemoryRegion gic_mr[XLNX_ZYNQMP_GIC_REGIONS][XLNX_ZYNQMP_GIC_ALIASES]; CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; |