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authorPeter Maydell <peter.maydell@linaro.org>2022-03-15 11:27:19 +0000
committerPeter Maydell <peter.maydell@linaro.org>2022-03-15 11:27:19 +0000
commitac621d40b58fcf9a058680a2a114718a0710abcc (patch)
tree5277abca655045d2eb587d5868284e616780635e /include
parenta72ada1662ee3105c5d66ddc8930d98e9cab62be (diff)
parent9c10d86fee11d96274ea6f7cda12d2471abe3c47 (diff)
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Merge tag 'pull-ppc-20220314' of https://github.com/legoater/qemu into staging
ppc-7.0 queue : * Removal of user-created PHB devices * Avocado fixes for --disable-tcg * Instruction and Radix MMU fixes # gpg: Signature made Mon 14 Mar 2022 15:16:07 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20220314' of https://github.com/legoater/qemu: ppc/pnv: Remove user-created PHB{3,4,5} devices ppc/pnv: Always create the PHB5 PEC devices ppc/pnv: Introduce a pnv-phb5 device to match root port ppc/xive2: Make type Xive2EndSource not user creatable target/ppc: fix xxspltw for big endian hosts target/ppc: fix ISI fault cause for Radix MMU avocado/ppc_virtex_ml507.py: check TCG accel in test_ppc_virtex_ml507() avocado/ppc_prep_40p.py: check TCG accel in all tests avocado/ppc_mpc8544ds.py: check TCG accel in test_ppc_mpc8544ds() avocado/ppc_bamboo.py: check TCG accel in test_ppc_bamboo() avocado/ppc_74xx.py: check TCG accel for all tests avocado/ppc_405.py: check TCG accel in test_ppc_ref405ep() avocado/ppc_405.py: remove test_ppc_taihu() avocado/boot_linux_console.py: check TCG accel in test_ppc_mac99() avocado/boot_linux_console.py: check TCG accel in test_ppc_g3beige() avocado/replay_kernel.py: make tcg-icount check in run_vm() avocado/boot_linux_console.py: check tcg accel in test_ppc64_e500 avocado/boot_linux_console.py: check for tcg in test_ppc_powernv8/9 qtest/meson.build: check CONFIG_TCG for boot-serial-test in qtests_ppc qtest/meson.build: check CONFIG_TCG for prom-env-test in qtests_ppc Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/pci-host/pnv_phb4.h5
-rw-r--r--include/hw/ppc/pnv.h1
2 files changed, 5 insertions, 1 deletions
diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
index fbcf5bf..b02ecdc 100644
--- a/include/hw/pci-host/pnv_phb4.h
+++ b/include/hw/pci-host/pnv_phb4.h
@@ -203,6 +203,7 @@ struct PnvPhb4PecClass {
const char *stk_compat;
int stk_compat_size;
uint64_t version;
+ const char *phb_type;
const uint32_t *num_phbs;
const char *rp_model;
};
@@ -211,6 +212,10 @@ struct PnvPhb4PecClass {
* POWER10 definitions
*/
+#define TYPE_PNV_PHB5 "pnv-phb5"
+#define PNV_PHB5(obj) \
+ OBJECT_CHECK(PnvPhb4, (obj), TYPE_PNV_PHB5)
+
#define PNV_PHB5_VERSION 0x000000a500000001ull
#define PNV_PHB5_DEVICE_ID 0x0652
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 1e34ddd..86cb7d7 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -190,7 +190,6 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
void pnv_phb_attach_root_port(PCIHostState *pci, const char *name);
-void pnv_chip_parent_fixup(PnvChip *chip, Object *obj, int index);
#define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
typedef struct PnvMachineClass PnvMachineClass;