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authorNicholas Piggin <npiggin@gmail.com>2023-07-06 15:39:22 +1000
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-07-07 04:47:50 -0300
commitaa2addf96f2629101ef0aa0c9226d38867c72d76 (patch)
tree17a202612bd770cb98d2d2a93664a59d744cd014 /include
parentb0afb574bad3c3a27acd2c3e7a17306a3648b0ac (diff)
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ppc/pnv: Set P10 core xscom region size to match hardware
The P10 core xscom memory regions overlap because the size is wrong. The P10 core+L2 xscom region size is allocated as 0x1000 (with some unused ranges). "EC" is used as a closer match, as "EX" includes L3 which has a disjoint xscom range that would require a different region if it were implemented. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Message-ID: <20230706053923.115003-2-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/ppc/pnv_core.h1
-rw-r--r--include/hw/ppc/pnv_xscom.h2
2 files changed, 2 insertions, 1 deletions
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 77ef00f..aa5ca28 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -46,6 +46,7 @@ struct PnvCoreClass {
DeviceClass parent_class;
const MemoryRegionOps *xscom_ops;
+ uint64_t xscom_size;
};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index f7da9a1..a4c9d95 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -133,7 +133,7 @@ struct PnvXScomInterfaceClass {
#define PNV10_XSCOM_EC_BASE(core) \
((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3))
-#define PNV10_XSCOM_EC_SIZE 0x100000
+#define PNV10_XSCOM_EC_SIZE 0x1000
#define PNV10_XSCOM_PSIHB_BASE 0x3011D00
#define PNV10_XSCOM_PSIHB_SIZE 0x100