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author | Peter Maydell <peter.maydell@linaro.org> | 2021-01-28 11:41:27 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-01-29 15:54:42 +0000 |
commit | 7cc378edee91c3f5c76cbb90953ba9ed2a57cb11 (patch) | |
tree | 073e246fa5ed247b83498b9530c60aa8898689c8 /include | |
parent | b56d351e25065d46fb959081fe13e8d031df35f3 (diff) | |
download | qemu-7cc378edee91c3f5c76cbb90953ba9ed2a57cb11.zip qemu-7cc378edee91c3f5c76cbb90953ba9ed2a57cb11.tar.gz qemu-7cc378edee91c3f5c76cbb90953ba9ed2a57cb11.tar.bz2 |
hw/timer/cmsdk-apb-timer: Add Clock input
As the first step in converting the CMSDK_APB_TIMER device to the
Clock framework, add a Clock input. For the moment we do nothing
with this clock; we will change the behaviour from using the pclk-frq
property to using the Clock once all the users of this device have
been converted to wire up the Clock.
Since the device doesn't already have a doc comment for its "QEMU
interface", we add one including the new Clock.
This is a migration compatibility break for machines mps2-an505,
mps2-an521, musca-a, musca-b1.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Luc Michel <luc@lmichel.fr>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210128114145.20536-8-peter.maydell@linaro.org
Message-id: 20210121190622.22000-8-peter.maydell@linaro.org
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/timer/cmsdk-apb-timer.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/timer/cmsdk-apb-timer.h b/include/hw/timer/cmsdk-apb-timer.h index baa009b..fc2aa97 100644 --- a/include/hw/timer/cmsdk-apb-timer.h +++ b/include/hw/timer/cmsdk-apb-timer.h @@ -15,11 +15,19 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "hw/ptimer.h" +#include "hw/clock.h" #include "qom/object.h" #define TYPE_CMSDK_APB_TIMER "cmsdk-apb-timer" OBJECT_DECLARE_SIMPLE_TYPE(CMSDKAPBTimer, CMSDK_APB_TIMER) +/* + * QEMU interface: + * + QOM property "pclk-frq": frequency at which the timer is clocked + * + Clock input "pclk": clock for the timer + * + sysbus MMIO region 0: the register bank + * + sysbus IRQ 0: timer interrupt TIMERINT + */ struct CMSDKAPBTimer { /*< private >*/ SysBusDevice parent_obj; @@ -29,6 +37,7 @@ struct CMSDKAPBTimer { qemu_irq timerint; uint32_t pclk_frq; struct ptimer_state *timer; + Clock *pclk; uint32_t ctrl; uint32_t value; |