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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-09-30 11:52:41 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-30 11:52:41 +0100 |
| commit | 45c270b1ea7987ab93e41ab095dd77370523e6b3 (patch) | |
| tree | 5c26ecd923c8595f39308feb121551d55e8bfa5f /include | |
| parent | 29429c7244c73eefada3d0ec6dd30c5698782d08 (diff) | |
| parent | b6c73a6d45b63926066aa71702d6017e7e43724a (diff) | |
| download | qemu-45c270b1ea7987ab93e41ab095dd77370523e6b3.zip qemu-45c270b1ea7987ab93e41ab095dd77370523e6b3.tar.gz qemu-45c270b1ea7987ab93e41ab095dd77370523e6b3.tar.bz2 | |
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-201400729' into staging
tcg updates
# gpg: Signature made Mon 29 Sep 2014 19:58:04 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/tcg-next-201400729:
tcg: Always enable TCGv type checking
qemu/compiler: Define QEMU_ARTIFICIAL
tcg-aarch64: Use 32-bit loads for qemu_ld_i32
tcg-sparc: Use UMULXHI instruction
tcg-sparc: Rename ADDX/SUBX insns
tcg-sparc: Use ADDXC in setcond_i64
tcg-sparc: Fix setcond_i32 uninitialized value
tcg-sparc: Use ADDXC in addsub2_i64
tcg-sparc: Support addsub2_i64
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/elf.h | 37 | ||||
| -rw-r--r-- | include/qemu/compiler.h | 6 |
2 files changed, 35 insertions, 8 deletions
diff --git a/include/elf.h b/include/elf.h index 70107f0..a516584 100644 --- a/include/elf.h +++ b/include/elf.h @@ -473,14 +473,35 @@ typedef struct { #define PPC_FEATURE_TRUE_LE 0x00000002 #define PPC_FEATURE_PPC_LE 0x00000001 -/* Bits present in AT_HWCAP, primarily for Sparc32. */ - -#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ -#define HWCAP_SPARC_STBAR 2 -#define HWCAP_SPARC_SWAP 4 -#define HWCAP_SPARC_MULDIV 8 -#define HWCAP_SPARC_V9 16 -#define HWCAP_SPARC_ULTRA3 32 +/* Bits present in AT_HWCAP for Sparc. */ + +#define HWCAP_SPARC_FLUSH 0x00000001 +#define HWCAP_SPARC_STBAR 0x00000002 +#define HWCAP_SPARC_SWAP 0x00000004 +#define HWCAP_SPARC_MULDIV 0x00000008 +#define HWCAP_SPARC_V9 0x00000010 +#define HWCAP_SPARC_ULTRA3 0x00000020 +#define HWCAP_SPARC_BLKINIT 0x00000040 +#define HWCAP_SPARC_N2 0x00000080 +#define HWCAP_SPARC_MUL32 0x00000100 +#define HWCAP_SPARC_DIV32 0x00000200 +#define HWCAP_SPARC_FSMULD 0x00000400 +#define HWCAP_SPARC_V8PLUS 0x00000800 +#define HWCAP_SPARC_POPC 0x00001000 +#define HWCAP_SPARC_VIS 0x00002000 +#define HWCAP_SPARC_VIS2 0x00004000 +#define HWCAP_SPARC_ASI_BLK_INIT 0x00008000 +#define HWCAP_SPARC_FMAF 0x00010000 +#define HWCAP_SPARC_VIS3 0x00020000 +#define HWCAP_SPARC_HPC 0x00040000 +#define HWCAP_SPARC_RANDOM 0x00080000 +#define HWCAP_SPARC_TRANS 0x00100000 +#define HWCAP_SPARC_FJFMAU 0x00200000 +#define HWCAP_SPARC_IMA 0x00400000 +#define HWCAP_SPARC_ASI_CACHE_SPARING 0x00800000 +#define HWCAP_SPARC_PAUSE 0x01000000 +#define HWCAP_SPARC_CBCOND 0x02000000 +#define HWCAP_SPARC_CRYPTO 0x04000000 /* Bits present in AT_HWCAP for s390. */ diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h index 155b358..ac7c4c4 100644 --- a/include/qemu/compiler.h +++ b/include/qemu/compiler.h @@ -24,6 +24,12 @@ #define QEMU_WARN_UNUSED_RESULT #endif +#if QEMU_GNUC_PREREQ(4, 3) +#define QEMU_ARTIFICIAL __attribute__((always_inline, artificial)) +#else +#define QEMU_ARTIFICIAL +#endif + #if defined(_WIN32) # define QEMU_PACKED __attribute__((gcc_struct, packed)) #else |