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| author | Mostafa Saleh <smostafa@google.com> | 2023-05-25 10:37:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-05-30 13:02:53 +0100 |
| commit | 21eb5b5cde7f6f75751837d3082ce8b36070af33 (patch) | |
| tree | 092d1d22eee866b4df023d2425d9108712523811 /include | |
| parent | e703f7076a255cd13b1d9fc0934480a613614f14 (diff) | |
| download | qemu-21eb5b5cde7f6f75751837d3082ce8b36070af33.zip qemu-21eb5b5cde7f6f75751837d3082ce8b36070af33.tar.gz qemu-21eb5b5cde7f6f75751837d3082ce8b36070af33.tar.bz2 | |
hw/arm/smmuv3: Parse STE config for stage-2
Parse stage-2 configuration from STE and populate it in SMMUS2Cfg.
Validity of field values are checked when possible.
Only AA64 tables are supported and Small Translation Tables (STT) are
not supported.
According to SMMUv3 UM(IHI0070E) "5.2 Stream Table Entry": All fields
with an S2 prefix (with the exception of S2VMID) are IGNORED when
stage-2 bypasses translation (Config[1] == 0).
Which means that VMID can be used(for TLB tagging) even if stage-2 is
bypassed, so we parse it unconditionally when S2P exists. Otherwise
it is set to -1.(only S1P)
As stall is not supported, if S2S is set the translation would abort.
For S2R, we reuse the same code used for stage-1 with flag
record_faults. However when nested translation is supported we would
need to separate stage-1 and stage-2 faults.
Fix wrong shift in STE_S2HD, STE_S2HA, STE_S2S.
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20230516203327.2051088-6-smostafa@google.com
[PMM: fixed format string]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/smmu-common.h | 1 | ||||
| -rw-r--r-- | include/hw/arm/smmuv3.h | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index 97cea8e..4f1405d 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -29,6 +29,7 @@ /* VMSAv8-64 Translation constants and functions */ #define VMSA_LEVELS 4 +#define VMSA_MAX_S2_CONCAT 16 #define VMSA_STRIDE(gran) ((gran) - VMSA_LEVELS + 1) #define VMSA_BIT_LVL(isz, strd, lvl) ((isz) - (strd) * \ diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index a0c0264..6031d7d 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -83,4 +83,7 @@ struct SMMUv3Class { #define TYPE_ARM_SMMUV3 "arm-smmuv3" OBJECT_DECLARE_TYPE(SMMUv3State, SMMUv3Class, ARM_SMMUV3) +#define STAGE1_SUPPORTED(s) FIELD_EX32(s->idr[0], IDR0, S1P) +#define STAGE2_SUPPORTED(s) FIELD_EX32(s->idr[0], IDR0, S2P) + #endif |