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| author | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:39 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-03-02 06:51:39 +0100 |
| commit | 0aa2612a01f233a4a25fb89e8362baf6cf896be6 (patch) | |
| tree | 843c92a177ce54f209f8f069fa35aa3405d5f938 /include | |
| parent | aadf13abaad43dd1f8b6113e516649578af63775 (diff) | |
| download | qemu-0aa2612a01f233a4a25fb89e8362baf6cf896be6.zip qemu-0aa2612a01f233a4a25fb89e8362baf6cf896be6.tar.gz qemu-0aa2612a01f233a4a25fb89e8362baf6cf896be6.tar.bz2 | |
ppc/xive: Add support for PQ state bits offload
The trigger message coming from a HW source contains a special bit
informing the XIVE interrupt controller that the PQ bits have been
checked at the source or not. Depending on the value, the IC can
perform the check and the state transition locally using its own PQ
state bits.
The following changes add new accessors to the XiveRouter required to
query and update the PQ state bits. This only applies to the PowerNV
machine. sPAPR accessors are provided but the pSeries machine should
not be concerned by such complex configuration for the moment.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/ppc/xive.h | 8 | ||||
| -rw-r--r-- | include/hw/ppc/xive2.h | 6 |
2 files changed, 11 insertions, 3 deletions
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 875c7f6..649b58a 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -160,7 +160,7 @@ DECLARE_CLASS_CHECKERS(XiveNotifierClass, XIVE_NOTIFIER, struct XiveNotifierClass { InterfaceClass parent; - void (*notify)(XiveNotifier *xn, uint32_t lisn); + void (*notify)(XiveNotifier *xn, uint32_t lisn, bool pq_checked); }; /* @@ -386,6 +386,10 @@ struct XiveRouterClass { /* XIVE table accessors */ int (*get_eas)(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, XiveEAS *eas); + int (*get_pq)(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, + uint8_t *pq); + int (*set_pq)(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, + uint8_t *pq); int (*get_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx, XiveEND *end); int (*write_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx, @@ -407,7 +411,7 @@ int xive_router_get_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt); int xive_router_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt, uint8_t word_number); -void xive_router_notify(XiveNotifier *xn, uint32_t lisn); +void xive_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked); /* * XIVE Presenter diff --git a/include/hw/ppc/xive2.h b/include/hw/ppc/xive2.h index 0897ddb..eb255b6 100644 --- a/include/hw/ppc/xive2.h +++ b/include/hw/ppc/xive2.h @@ -31,6 +31,10 @@ typedef struct Xive2RouterClass { /* XIVE table accessors */ int (*get_eas)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx, Xive2Eas *eas); + int (*get_pq)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx, + uint8_t *pq); + int (*set_pq)(Xive2Router *xrtr, uint8_t eas_blk, uint32_t eas_idx, + uint8_t *pq); int (*get_end)(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx, Xive2End *end); int (*write_end)(Xive2Router *xrtr, uint8_t end_blk, uint32_t end_idx, @@ -53,7 +57,7 @@ int xive2_router_get_nvp(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx, int xive2_router_write_nvp(Xive2Router *xrtr, uint8_t nvp_blk, uint32_t nvp_idx, Xive2Nvp *nvp, uint8_t word_number); -void xive2_router_notify(XiveNotifier *xn, uint32_t lisn); +void xive2_router_notify(XiveNotifier *xn, uint32_t lisn, bool pq_checked); /* * XIVE2 Presenter (POWER10) |