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authorBALATON Zoltan <balaton@eik.bme.hu>2018-02-15 22:27:06 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2018-02-16 14:06:07 +1100
commit58d5b22bbd505dc942d137d5d3da89ad9bc16c0a (patch)
treec23ca19810bd4e2365e7ce3ce94c56f346c23025 /include/hw
parent4f5b039d2bf9bb26b6e26a3dc65da36fe970cba9 (diff)
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ppc4xx: Add device models found in PPC440 core SoCs
These devices are found in newer SoCs based on 440 core e.g. the 460EX (http://www.embeddeddeveloper.com/assets/processors/amcc/datasheets/ PP460EX_DS2063.pdf) Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw')
-rw-r--r--include/hw/pci/pcie_host.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/pci/pcie_host.h b/include/hw/pci/pcie_host.h
index 4d23c80..3f7b988 100644
--- a/include/hw/pci/pcie_host.h
+++ b/include/hw/pci/pcie_host.h
@@ -65,7 +65,7 @@ void pcie_host_mmcfg_update(PCIExpressHost *e,
* bit 12 - 14: function number
* bit 0 - 11: offset in configuration space of a given device
*/
-#define PCIE_MMCFG_SIZE_MAX (1ULL << 28)
+#define PCIE_MMCFG_SIZE_MAX (1ULL << 29)
#define PCIE_MMCFG_SIZE_MIN (1ULL << 20)
#define PCIE_MMCFG_BUS_BIT 20
#define PCIE_MMCFG_BUS_MASK 0x1ff