Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-january-17-2019-v2' into staging

MIPS queue for January 17, 2019 - v2

# gpg: Signature made Fri 18 Jan 2019 15:55:35 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-january-17-2019-v2:
  target/mips: Introduce 32 R5900 multimedia registers
  target/mips: Rename 'rn' to 'register_name'
  target/mips: Add CP0 register MemoryMapID
  target/mips: Amend preprocessor constants for CP0 registers
  target/mips: Update ITU to handle bus errors
  target/mips: Update ITU to utilize SAARI and SAAR CP0 registers
  target/mips: Add field and R/W access to ITU control register ICR0
  target/mips: Provide R/W access to SAARI and SAAR CP0 registers
  target/mips: Add fields for SAARI and SAAR CP0 registers
  target/mips: Use preprocessor constants for 32 major CP0 registers
  target/mips: Add preprocessor constants for 32 major CP0 registers
  target/mips: Move comment containing summary of CP0 registers

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/include/hw/misc/mips_itu.h b/include/hw/misc/mips_itu.h
index 030eb4a..c44e767 100644
--- a/include/hw/misc/mips_itu.h
+++ b/include/hw/misc/mips_itu.h
@@ -66,6 +66,14 @@ typedef struct MIPSITUState {
     /* ITC Configuration Tags */
     uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM];
     MemoryRegion tag_io;
+
+    /* ITU Control Register */
+    uint64_t icr0;
+
+    /* SAAR */
+    bool saar_present;
+    void *saar;
+
 } MIPSITUState;
 
 /* Get ITC Configuration Tag memory region. */