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| author | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:50 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-08-24 13:17:50 +0100 |
| commit | 239cb6feb298a31faa40b7e97ced107bf9c2f2bf (patch) | |
| tree | ca65b40483416b57411a1415563e245538e3e926 /include/hw/ssi/pl022.h | |
| parent | cfb7ba983857e40e88bd3219aaab908862581ac0 (diff) | |
| download | qemu-239cb6feb298a31faa40b7e97ced107bf9c2f2bf.zip qemu-239cb6feb298a31faa40b7e97ced107bf9c2f2bf.tar.gz qemu-239cb6feb298a31faa40b7e97ced107bf9c2f2bf.tar.bz2 | |
hw/arm/mps2: Fix ID register errors on AN511 and AN385
Fix MPS2 SCC config register values for the mps2-an511
and mps2-an385 boards:
* the SCC_AID bits [23:20] specify the FPGA build target board revision,
and the SCC_CFG4 register specifies the actual board revision, so
these should have matching values. Claim to be board revision C,
consistently -- we had the revision in the wrong part of SCC_AID.
* SCC_ID bits [15:4] should be the board number in hex, not decimal
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180823175225.22612-1-peter.maydell@linaro.org
Diffstat (limited to 'include/hw/ssi/pl022.h')
0 files changed, 0 insertions, 0 deletions