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authorEduardo Habkost <ehabkost@redhat.com>2020-09-03 16:43:22 -0400
committerEduardo Habkost <ehabkost@redhat.com>2020-09-09 09:26:43 -0400
commitdb1015e92e04835c9eb50c29625fe566d1202dbd (patch)
tree41fbc0bf3e3f29b7ecb339224a049e3f2a7db8fa /include/hw/ppc
parent1c8eef0227e2942264063f22f10a06b84e0d3fa9 (diff)
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Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/mac_dbdma.h6
-rw-r--r--include/hw/ppc/openpic.h6
-rw-r--r--include/hw/ppc/pnv.h33
-rw-r--r--include/hw/ppc/pnv_core.h16
-rw-r--r--include/hw/ppc/pnv_homer.h11
-rw-r--r--include/hw/ppc/pnv_lpc.h11
-rw-r--r--include/hw/ppc/pnv_occ.h11
-rw-r--r--include/hw/ppc/pnv_pnor.h6
-rw-r--r--include/hw/ppc/pnv_psi.h21
-rw-r--r--include/hw/ppc/pnv_xive.h11
-rw-r--r--include/hw/ppc/pnv_xscom.h5
-rw-r--r--include/hw/ppc/spapr.h3
-rw-r--r--include/hw/ppc/spapr_cpu_core.h11
-rw-r--r--include/hw/ppc/spapr_irq.h6
-rw-r--r--include/hw/ppc/spapr_tpm_proxy.h5
-rw-r--r--include/hw/ppc/spapr_vio.h10
-rw-r--r--include/hw/ppc/xics.h6
-rw-r--r--include/hw/ppc/xics_spapr.h1
-rw-r--r--include/hw/ppc/xive.h41
19 files changed, 138 insertions, 82 deletions
diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h
index 26cc469..e1f42cd 100644
--- a/include/hw/ppc/mac_dbdma.h
+++ b/include/hw/ppc/mac_dbdma.h
@@ -27,6 +27,7 @@
#include "qemu/iov.h"
#include "sysemu/dma.h"
#include "hw/sysbus.h"
+#include "qom/object.h"
typedef struct DBDMA_io DBDMA_io;
@@ -160,13 +161,14 @@ typedef struct DBDMA_channel {
dbdma_cmd current;
} DBDMA_channel;
-typedef struct {
+struct DBDMAState {
SysBusDevice parent_obj;
MemoryRegion mem;
DBDMA_channel channels[DBDMA_CHANNELS];
QEMUBH *bh;
-} DBDMAState;
+};
+typedef struct DBDMAState DBDMAState;
/* Externally callable functions */
diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h
index db0d29e..81a0b3b 100644
--- a/include/hw/ppc/openpic.h
+++ b/include/hw/ppc/openpic.h
@@ -3,6 +3,7 @@
#include "hw/sysbus.h"
#include "hw/core/cpu.h"
+#include "qom/object.h"
#define MAX_CPU 32
#define MAX_MSI 8
@@ -136,9 +137,10 @@ typedef struct IRQDest {
} IRQDest;
#define TYPE_OPENPIC "openpic"
+typedef struct OpenPICState OpenPICState;
#define OPENPIC(obj) OBJECT_CHECK(OpenPICState, (obj), TYPE_OPENPIC)
-typedef struct OpenPICState {
+struct OpenPICState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
@@ -183,6 +185,6 @@ typedef struct OpenPICState {
uint32_t irq_ipi0;
uint32_t irq_tim0;
uint32_t irq_msi;
-} OpenPICState;
+};
#endif /* OPENPIC_H */
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index d4b0b0e..64f9ee8 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -32,15 +32,18 @@
#include "hw/ppc/pnv_core.h"
#include "hw/pci-host/pnv_phb3.h"
#include "hw/pci-host/pnv_phb4.h"
+#include "qom/object.h"
#define TYPE_PNV_CHIP "pnv-chip"
+typedef struct PnvChip PnvChip;
+typedef struct PnvChipClass PnvChipClass;
#define PNV_CHIP(obj) OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP)
#define PNV_CHIP_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvChipClass, (klass), TYPE_PNV_CHIP)
#define PNV_CHIP_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvChipClass, (obj), TYPE_PNV_CHIP)
-typedef struct PnvChip {
+struct PnvChip {
/*< private >*/
SysBusDevice parent_obj;
@@ -61,12 +64,13 @@ typedef struct PnvChip {
AddressSpace xscom_as;
gchar *dt_isa_nodename;
-} PnvChip;
+};
#define TYPE_PNV8_CHIP "pnv8-chip"
+typedef struct Pnv8Chip Pnv8Chip;
#define PNV8_CHIP(obj) OBJECT_CHECK(Pnv8Chip, (obj), TYPE_PNV8_CHIP)
-typedef struct Pnv8Chip {
+struct Pnv8Chip {
/*< private >*/
PnvChip parent_obj;
@@ -82,12 +86,13 @@ typedef struct Pnv8Chip {
PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX];
XICSFabric *xics;
-} Pnv8Chip;
+};
#define TYPE_PNV9_CHIP "pnv9-chip"
+typedef struct Pnv9Chip Pnv9Chip;
#define PNV9_CHIP(obj) OBJECT_CHECK(Pnv9Chip, (obj), TYPE_PNV9_CHIP)
-typedef struct Pnv9Chip {
+struct Pnv9Chip {
/*< private >*/
PnvChip parent_obj;
@@ -103,7 +108,7 @@ typedef struct Pnv9Chip {
#define PNV9_CHIP_MAX_PEC 3
PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC];
-} Pnv9Chip;
+};
/*
* A SMT8 fused core is a pair of SMT4 cores.
@@ -112,18 +117,19 @@ typedef struct Pnv9Chip {
#define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f)
#define TYPE_PNV10_CHIP "pnv10-chip"
+typedef struct Pnv10Chip Pnv10Chip;
#define PNV10_CHIP(obj) OBJECT_CHECK(Pnv10Chip, (obj), TYPE_PNV10_CHIP)
-typedef struct Pnv10Chip {
+struct Pnv10Chip {
/*< private >*/
PnvChip parent_obj;
/*< public >*/
Pnv9Psi psi;
PnvLpcController lpc;
-} Pnv10Chip;
+};
-typedef struct PnvChipClass {
+struct PnvChipClass {
/*< private >*/
SysBusDeviceClass parent_class;
@@ -144,7 +150,7 @@ typedef struct PnvChipClass {
void (*pic_print_info)(PnvChip *chip, Monitor *mon);
uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
-} PnvChipClass;
+};
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
#define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX
@@ -191,6 +197,8 @@ typedef struct PnvChipClass {
PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
#define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv")
+typedef struct PnvMachineClass PnvMachineClass;
+typedef struct PnvMachineState PnvMachineState;
#define PNV_MACHINE(obj) \
OBJECT_CHECK(PnvMachineState, (obj), TYPE_PNV_MACHINE)
#define PNV_MACHINE_GET_CLASS(obj) \
@@ -198,9 +206,8 @@ PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
#define PNV_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvMachineClass, klass, TYPE_PNV_MACHINE)
-typedef struct PnvMachineState PnvMachineState;
-typedef struct PnvMachineClass {
+struct PnvMachineClass {
/*< private >*/
MachineClass parent_class;
@@ -209,7 +216,7 @@ typedef struct PnvMachineClass {
int compat_size;
void (*dt_power_mgt)(PnvMachineState *pnv, void *fdt);
-} PnvMachineClass;
+};
struct PnvMachineState {
/*< private >*/
diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h
index 113550e..2d91a7d 100644
--- a/include/hw/ppc/pnv_core.h
+++ b/include/hw/ppc/pnv_core.h
@@ -22,8 +22,11 @@
#include "hw/cpu/core.h"
#include "target/ppc/cpu.h"
+#include "qom/object.h"
#define TYPE_PNV_CORE "powernv-cpu-core"
+typedef struct PnvCore PnvCore;
+typedef struct PnvCoreClass PnvCoreClass;
#define PNV_CORE(obj) \
OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE)
#define PNV_CORE_CLASS(klass) \
@@ -33,7 +36,7 @@
typedef struct PnvChip PnvChip;
-typedef struct PnvCore {
+struct PnvCore {
/*< private >*/
CPUCore parent_obj;
@@ -44,13 +47,13 @@ typedef struct PnvCore {
PnvChip *chip;
MemoryRegion xscom_regs;
-} PnvCore;
+};
-typedef struct PnvCoreClass {
+struct PnvCoreClass {
DeviceClass parent_class;
const MemoryRegionOps *xscom_ops;
-} PnvCoreClass;
+};
#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE
#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX
@@ -65,13 +68,14 @@ static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu)
}
#define TYPE_PNV_QUAD "powernv-cpu-quad"
+typedef struct PnvQuad PnvQuad;
#define PNV_QUAD(obj) \
OBJECT_CHECK(PnvQuad, (obj), TYPE_PNV_QUAD)
-typedef struct PnvQuad {
+struct PnvQuad {
DeviceState parent_obj;
uint32_t id;
MemoryRegion xscom_regs;
-} PnvQuad;
+};
#endif /* PPC_PNV_CORE_H */
diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h
index 1e91c95..bedba94 100644
--- a/include/hw/ppc/pnv_homer.h
+++ b/include/hw/ppc/pnv_homer.h
@@ -21,28 +21,31 @@
#define PPC_PNV_HOMER_H
#include "hw/ppc/pnv.h"
+#include "qom/object.h"
#define TYPE_PNV_HOMER "pnv-homer"
+typedef struct PnvHomer PnvHomer;
+typedef struct PnvHomerClass PnvHomerClass;
#define PNV_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV_HOMER)
#define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8"
#define PNV8_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV8_HOMER)
#define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9"
#define PNV9_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV9_HOMER)
-typedef struct PnvHomer {
+struct PnvHomer {
DeviceState parent;
struct PnvChip *chip;
MemoryRegion pba_regs;
MemoryRegion regs;
-} PnvHomer;
+};
#define PNV_HOMER_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvHomerClass, (klass), TYPE_PNV_HOMER)
#define PNV_HOMER_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvHomerClass, (obj), TYPE_PNV_HOMER)
-typedef struct PnvHomerClass {
+struct PnvHomerClass {
DeviceClass parent_class;
int pba_size;
@@ -51,6 +54,6 @@ typedef struct PnvHomerClass {
const MemoryRegionOps *homer_ops;
hwaddr core_max_base;
-} PnvHomerClass;
+};
#endif /* PPC_PNV_HOMER_H */
diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
index c1ec85d..50d9251 100644
--- a/include/hw/ppc/pnv_lpc.h
+++ b/include/hw/ppc/pnv_lpc.h
@@ -21,8 +21,11 @@
#define PPC_PNV_LPC_H
#include "hw/ppc/pnv_psi.h"
+#include "qom/object.h"
#define TYPE_PNV_LPC "pnv-lpc"
+typedef struct PnvLpcClass PnvLpcClass;
+typedef struct PnvLpcController PnvLpcController;
#define PNV_LPC(obj) \
OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC)
#define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8"
@@ -34,7 +37,7 @@
#define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10"
#define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC)
-typedef struct PnvLpcController {
+struct PnvLpcController {
DeviceState parent;
uint64_t eccb_stat_reg;
@@ -79,20 +82,20 @@ typedef struct PnvLpcController {
/* PSI to generate interrupts */
PnvPsi *psi;
-} PnvLpcController;
+};
#define PNV_LPC_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC)
#define PNV_LPC_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC)
-typedef struct PnvLpcClass {
+struct PnvLpcClass {
DeviceClass parent_class;
int psi_irq;
DeviceRealize parent_realize;
-} PnvLpcClass;
+};
/*
* Old compilers error on typdef forward declarations. Keep them happy.
diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h
index f8d3061..30a9fae 100644
--- a/include/hw/ppc/pnv_occ.h
+++ b/include/hw/ppc/pnv_occ.h
@@ -21,8 +21,11 @@
#define PPC_PNV_OCC_H
#include "hw/ppc/pnv_psi.h"
+#include "qom/object.h"
#define TYPE_PNV_OCC "pnv-occ"
+typedef struct PnvOCC PnvOCC;
+typedef struct PnvOCCClass PnvOCCClass;
#define PNV_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV_OCC)
#define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8"
#define PNV8_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV8_OCC)
@@ -32,7 +35,7 @@
#define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000
#define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800
-typedef struct PnvOCC {
+struct PnvOCC {
DeviceState xd;
/* OCC Misc interrupt */
@@ -42,20 +45,20 @@ typedef struct PnvOCC {
MemoryRegion xscom_regs;
MemoryRegion sram_regs;
-} PnvOCC;
+};
#define PNV_OCC_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvOCCClass, (klass), TYPE_PNV_OCC)
#define PNV_OCC_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvOCCClass, (obj), TYPE_PNV_OCC)
-typedef struct PnvOCCClass {
+struct PnvOCCClass {
DeviceClass parent_class;
int xscom_size;
const MemoryRegionOps *xscom_ops;
int psi_irq;
-} PnvOCCClass;
+};
#define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i) \
(PNV_OCC_SENSOR_DATA_BLOCK_OFFSET + (i) * PNV_OCC_SENSOR_DATA_BLOCK_SIZE)
diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h
index 4f96abd..8b27bf1 100644
--- a/include/hw/ppc/pnv_pnor.h
+++ b/include/hw/ppc/pnv_pnor.h
@@ -8,6 +8,7 @@
*/
#ifndef _PPC_PNV_PNOR_H
#define _PPC_PNV_PNOR_H
+#include "qom/object.h"
/*
* PNOR offset on the LPC FW address space
@@ -15,9 +16,10 @@
#define PNOR_SPI_OFFSET 0x0c000000UL
#define TYPE_PNV_PNOR "pnv-pnor"
+typedef struct PnvPnor PnvPnor;
#define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR)
-typedef struct PnvPnor {
+struct PnvPnor {
SysBusDevice parent_obj;
BlockBackend *blk;
@@ -25,6 +27,6 @@ typedef struct PnvPnor {
uint8_t *storage;
int64_t size;
MemoryRegion mmio;
-} PnvPnor;
+};
#endif /* _PPC_PNV_PNOR_H */
diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
index 979fc59..060a7a1 100644
--- a/include/hw/ppc/pnv_psi.h
+++ b/include/hw/ppc/pnv_psi.h
@@ -23,14 +23,17 @@
#include "hw/sysbus.h"
#include "hw/ppc/xics.h"
#include "hw/ppc/xive.h"
+#include "qom/object.h"
#define TYPE_PNV_PSI "pnv-psi"
+typedef struct PnvPsi PnvPsi;
+typedef struct PnvPsiClass PnvPsiClass;
#define PNV_PSI(obj) \
OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
#define PSIHB_XSCOM_MAX 0x20
-typedef struct PnvPsi {
+struct PnvPsi {
DeviceState parent;
MemoryRegion regs_mr;
@@ -47,27 +50,29 @@ typedef struct PnvPsi {
uint64_t regs[PSIHB_XSCOM_MAX];
MemoryRegion xscom_regs;
-} PnvPsi;
+};
#define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8"
+typedef struct Pnv8Psi Pnv8Psi;
#define PNV8_PSI(obj) \
OBJECT_CHECK(Pnv8Psi, (obj), TYPE_PNV8_PSI)
-typedef struct Pnv8Psi {
+struct Pnv8Psi {
PnvPsi parent;
ICSState ics;
-} Pnv8Psi;
+};
#define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9"
+typedef struct Pnv9Psi Pnv9Psi;
#define PNV9_PSI(obj) \
OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI)
-typedef struct Pnv9Psi {
+struct Pnv9Psi {
PnvPsi parent;
XiveSource source;
-} Pnv9Psi;
+};
#define TYPE_PNV10_PSI TYPE_PNV_PSI "-POWER10"
@@ -76,7 +81,7 @@ typedef struct Pnv9Psi {
#define PNV_PSI_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI)
-typedef struct PnvPsiClass {
+struct PnvPsiClass {
SysBusDeviceClass parent_class;
uint32_t xscom_pcba;
@@ -86,7 +91,7 @@ typedef struct PnvPsiClass {
int compat_size;
void (*irq_set)(PnvPsi *psi, int, bool state);
-} PnvPsiClass;
+};
/* The PSI and FSP interrupts are muxed on the same IRQ number */
typedef enum PnvPsiIrq {
diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h
index 76cf16f..24c37de 100644
--- a/include/hw/ppc/pnv_xive.h
+++ b/include/hw/ppc/pnv_xive.h
@@ -11,10 +11,13 @@
#define PPC_PNV_XIVE_H
#include "hw/ppc/xive.h"
+#include "qom/object.h"
struct PnvChip;
#define TYPE_PNV_XIVE "pnv-xive"
+typedef struct PnvXive PnvXive;
+typedef struct PnvXiveClass PnvXiveClass;
#define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE)
#define PNV_XIVE_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvXiveClass, (klass), TYPE_PNV_XIVE)
@@ -28,7 +31,7 @@ struct PnvChip;
#define XIVE_TABLE_VDT_MAX 16 /* VDT Domain Table (0-15) */
#define XIVE_TABLE_EDT_MAX 64 /* EDT Domain Table (0-63) */
-typedef struct PnvXive {
+struct PnvXive {
XiveRouter parent_obj;
/* Owning chip */
@@ -87,13 +90,13 @@ typedef struct PnvXive {
uint64_t mig[XIVE_TABLE_MIG_MAX];
uint64_t vdt[XIVE_TABLE_VDT_MAX];
uint64_t edt[XIVE_TABLE_EDT_MAX];
-} PnvXive;
+};
-typedef struct PnvXiveClass {
+struct PnvXiveClass {
XiveRouterClass parent_class;
DeviceRealize parent_realize;
-} PnvXiveClass;
+};
void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon);
diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h
index 09156a5..fb9b97f 100644
--- a/include/hw/ppc/pnv_xscom.h
+++ b/include/hw/ppc/pnv_xscom.h
@@ -27,16 +27,17 @@ typedef struct PnvXScomInterface PnvXScomInterface;
#define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface"
#define PNV_XSCOM_INTERFACE(obj) \
INTERFACE_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE)
+typedef struct PnvXScomInterfaceClass PnvXScomInterfaceClass;
#define PNV_XSCOM_INTERFACE_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \
TYPE_PNV_XSCOM_INTERFACE)
#define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \
OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE)
-typedef struct PnvXScomInterfaceClass {
+struct PnvXScomInterfaceClass {
InterfaceClass parent;
int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset);
-} PnvXScomInterfaceClass;
+};
/*
* Layout of the XSCOM PCB addresses of EX core 1 (POWER 8)
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index e50a267..c0be898 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -8,6 +8,7 @@
#include "hw/mem/pc-dimm.h"
#include "hw/ppc/spapr_ovec.h"
#include "hw/ppc/spapr_irq.h"
+#include "qom/object.h"
#include "hw/ppc/spapr_xive.h" /* For SpaprXive */
#include "hw/ppc/xics.h" /* For ICSState */
#include "hw/ppc/spapr_tpm_proxy.h"
@@ -27,10 +28,10 @@ typedef struct SpaprPendingHpt SpaprPendingHpt;
#define TYPE_SPAPR_RTC "spapr-rtc"
+typedef struct SpaprRtcState SpaprRtcState;
#define SPAPR_RTC(obj) \
OBJECT_CHECK(SpaprRtcState, (obj), TYPE_SPAPR_RTC)
-typedef struct SpaprRtcState SpaprRtcState;
struct SpaprRtcState {
/*< private >*/
DeviceState parent_obj;
diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
index 7aed8f5..adcf74d 100644
--- a/include/hw/ppc/spapr_cpu_core.h
+++ b/include/hw/ppc/spapr_cpu_core.h
@@ -13,8 +13,11 @@
#include "hw/qdev-core.h"
#include "target/ppc/cpu-qom.h"
#include "target/ppc/cpu.h"
+#include "qom/object.h"
#define TYPE_SPAPR_CPU_CORE "spapr-cpu-core"
+typedef struct SpaprCpuCore SpaprCpuCore;
+typedef struct SpaprCpuCoreClass SpaprCpuCoreClass;
#define SPAPR_CPU_CORE(obj) \
OBJECT_CHECK(SpaprCpuCore, (obj), TYPE_SPAPR_CPU_CORE)
#define SPAPR_CPU_CORE_CLASS(klass) \
@@ -24,7 +27,7 @@
#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE
-typedef struct SpaprCpuCore {
+struct SpaprCpuCore {
/*< private >*/
CPUCore parent_obj;
@@ -32,12 +35,12 @@ typedef struct SpaprCpuCore {
PowerPCCPU **threads;
int node_id;
bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */
-} SpaprCpuCore;
+};
-typedef struct SpaprCpuCoreClass {
+struct SpaprCpuCoreClass {
DeviceClass parent_class;
const char *cpu_type;
-} SpaprCpuCoreClass;
+};
const char *spapr_get_cpu_core_type(const char *cpu_type);
void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
index b161cce..83addd0 100644
--- a/include/hw/ppc/spapr_irq.h
+++ b/include/hw/ppc/spapr_irq.h
@@ -11,6 +11,7 @@
#define HW_SPAPR_IRQ_H
#include "target/ppc/cpu-qom.h"
+#include "qom/object.h"
/*
* IRQ range offsets per device type
@@ -35,12 +36,13 @@ typedef struct SpaprInterruptController SpaprInterruptController;
#define TYPE_SPAPR_INTC "spapr-interrupt-controller"
#define SPAPR_INTC(obj) \
INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC)
+typedef struct SpaprInterruptControllerClass SpaprInterruptControllerClass;
#define SPAPR_INTC_CLASS(klass) \
OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC)
#define SPAPR_INTC_GET_CLASS(obj) \
OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC)
-typedef struct SpaprInterruptControllerClass {
+struct SpaprInterruptControllerClass {
InterfaceClass parent;
int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers,
@@ -65,7 +67,7 @@ typedef struct SpaprInterruptControllerClass {
void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers,
void *fdt, uint32_t phandle);
int (*post_load)(SpaprInterruptController *intc, int version_id);
-} SpaprInterruptControllerClass;
+};
void spapr_irq_update_active_intc(struct SpaprMachineState *spapr);
diff --git a/include/hw/ppc/spapr_tpm_proxy.h b/include/hw/ppc/spapr_tpm_proxy.h
index c574e22..1e9890d 100644
--- a/include/hw/ppc/spapr_tpm_proxy.h
+++ b/include/hw/ppc/spapr_tpm_proxy.h
@@ -17,15 +17,16 @@
#include "hw/qdev-core.h"
#define TYPE_SPAPR_TPM_PROXY "spapr-tpm-proxy"
+typedef struct SpaprTpmProxy SpaprTpmProxy;
#define SPAPR_TPM_PROXY(obj) OBJECT_CHECK(SpaprTpmProxy, (obj), \
TYPE_SPAPR_TPM_PROXY)
-typedef struct SpaprTpmProxy {
+struct SpaprTpmProxy {
/*< private >*/
DeviceState parent;
char *host_path;
int host_fd;
-} SpaprTpmProxy;
+};
#endif /* HW_SPAPR_TPM_PROXY_H */
diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h
index bed7df6..9c9d14e 100644
--- a/include/hw/ppc/spapr_vio.h
+++ b/include/hw/ppc/spapr_vio.h
@@ -25,8 +25,11 @@
#include "hw/ppc/spapr.h"
#include "sysemu/dma.h"
#include "hw/irq.h"
+#include "qom/object.h"
#define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device"
+typedef struct SpaprVioDevice SpaprVioDevice;
+typedef struct SpaprVioDeviceClass SpaprVioDeviceClass;
#define VIO_SPAPR_DEVICE(obj) \
OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE)
#define VIO_SPAPR_DEVICE_CLASS(klass) \
@@ -35,6 +38,7 @@
OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE)
#define TYPE_SPAPR_VIO_BUS "spapr-vio-bus"
+typedef struct SpaprVioBus SpaprVioBus;
#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS)
#define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge"
@@ -46,10 +50,8 @@ typedef struct SpaprVioCrq {
int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq);
} SpaprVioCrq;
-typedef struct SpaprVioDevice SpaprVioDevice;
-typedef struct SpaprVioBus SpaprVioBus;
-typedef struct SpaprVioDeviceClass {
+struct SpaprVioDeviceClass {
DeviceClass parent_class;
const char *dt_name, *dt_type, *dt_compatible;
@@ -59,7 +61,7 @@ typedef struct SpaprVioDeviceClass {
void (*reset)(SpaprVioDevice *dev);
int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off);
const char *(*get_dt_compatible)(SpaprVioDevice *dev);
-} SpaprVioDeviceClass;
+};
struct SpaprVioDevice {
DeviceState qdev;
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 9ed58ec..e5f48fa 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -30,6 +30,7 @@
#include "exec/memory.h"
#include "hw/qdev-core.h"
+#include "qom/object.h"
#define XICS_IPI 0x2
#define XICS_BUID 0x1
@@ -145,17 +146,18 @@ struct ICSIRQState {
#define TYPE_XICS_FABRIC "xics-fabric"
#define XICS_FABRIC(obj) \
INTERFACE_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC)
+typedef struct XICSFabricClass XICSFabricClass;
#define XICS_FABRIC_CLASS(klass) \
OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC)
#define XICS_FABRIC_GET_CLASS(obj) \
OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC)
-typedef struct XICSFabricClass {
+struct XICSFabricClass {
InterfaceClass parent;
ICSState *(*ics_get)(XICSFabric *xi, int irq);
void (*ics_resend)(XICSFabric *xi);
ICPState *(*icp_get)(XICSFabric *xi, int server);
-} XICSFabricClass;
+};
ICPState *xics_icp_get(XICSFabric *xi, int server);
diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h
index 1c65c96..09e428d 100644
--- a/include/hw/ppc/xics_spapr.h
+++ b/include/hw/ppc/xics_spapr.h
@@ -28,6 +28,7 @@
#define XICS_SPAPR_H
#include "hw/ppc/spapr.h"
+#include "qom/object.h"
#define TYPE_ICS_SPAPR "ics-spapr"
#define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR)
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 2c42ae9..8ef9af1 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -143,6 +143,7 @@
#include "sysemu/kvm.h"
#include "hw/sysbus.h"
#include "hw/ppc/xive_regs.h"
+#include "qom/object.h"
/*
* XIVE Notifier (Interface between Source and Router)
@@ -153,21 +154,23 @@ typedef struct XiveNotifier XiveNotifier;
#define TYPE_XIVE_NOTIFIER "xive-notifier"
#define XIVE_NOTIFIER(obj) \
INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER)
+typedef struct XiveNotifierClass XiveNotifierClass;
#define XIVE_NOTIFIER_CLASS(klass) \
OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER)
#define XIVE_NOTIFIER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER)
-typedef struct XiveNotifierClass {
+struct XiveNotifierClass {
InterfaceClass parent;
void (*notify)(XiveNotifier *xn, uint32_t lisn);
-} XiveNotifierClass;
+};
/*
* XIVE Interrupt Source
*/
#define TYPE_XIVE_SOURCE "xive-source"
+typedef struct XiveSource XiveSource;
#define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE)
/*
@@ -177,7 +180,7 @@ typedef struct XiveNotifierClass {
#define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */
#define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */
-typedef struct XiveSource {
+struct XiveSource {
DeviceState parent;
/* IRQs */
@@ -198,7 +201,7 @@ typedef struct XiveSource {
MemoryRegion esb_mmio_kvm;
XiveNotifier *xive;
-} XiveSource;
+};
/*
* ESB MMIO setting. Can be one page, for both source triggering and
@@ -304,6 +307,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val);
*/
#define TYPE_XIVE_TCTX "xive-tctx"
+typedef struct XiveTCTX XiveTCTX;
#define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX)
/*
@@ -319,7 +323,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val);
typedef struct XivePresenter XivePresenter;
-typedef struct XiveTCTX {
+struct XiveTCTX {
DeviceState parent_obj;
CPUState *cs;
@@ -329,20 +333,22 @@ typedef struct XiveTCTX {
uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
XivePresenter *xptr;
-} XiveTCTX;
+};
/*
* XIVE Router
*/
typedef struct XiveFabric XiveFabric;
-typedef struct XiveRouter {
+struct XiveRouter {
SysBusDevice parent;
XiveFabric *xfb;
-} XiveRouter;
+};
+typedef struct XiveRouter XiveRouter;
#define TYPE_XIVE_ROUTER "xive-router"
+typedef struct XiveRouterClass XiveRouterClass;
#define XIVE_ROUTER(obj) \
OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER)
#define XIVE_ROUTER_CLASS(klass) \
@@ -350,7 +356,7 @@ typedef struct XiveRouter {
#define XIVE_ROUTER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER)
-typedef struct XiveRouterClass {
+struct XiveRouterClass {
SysBusDeviceClass parent;
/* XIVE table accessors */
@@ -365,7 +371,7 @@ typedef struct XiveRouterClass {
int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
XiveNVT *nvt, uint8_t word_number);
uint8_t (*get_block_id)(XiveRouter *xrtr);
-} XiveRouterClass;
+};
int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
XiveEAS *eas);
@@ -391,19 +397,20 @@ typedef struct XiveTCTXMatch {
#define TYPE_XIVE_PRESENTER "xive-presenter"
#define XIVE_PRESENTER(obj) \
INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
+typedef struct XivePresenterClass XivePresenterClass;
#define XIVE_PRESENTER_CLASS(klass) \
OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER)
#define XIVE_PRESENTER_GET_CLASS(obj) \
OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER)
-typedef struct XivePresenterClass {
+struct XivePresenterClass {
InterfaceClass parent;
int (*match_nvt)(XivePresenter *xptr, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv, XiveTCTXMatch *match);
bool (*in_kernel)(const XivePresenter *xptr);
-} XivePresenterClass;
+};
int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
uint8_t format,
@@ -417,28 +424,30 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
#define TYPE_XIVE_FABRIC "xive-fabric"
#define XIVE_FABRIC(obj) \
INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC)
+typedef struct XiveFabricClass XiveFabricClass;
#define XIVE_FABRIC_CLASS(klass) \
OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC)
#define XIVE_FABRIC_GET_CLASS(obj) \
OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC)
-typedef struct XiveFabricClass {
+struct XiveFabricClass {
InterfaceClass parent;
int (*match_nvt)(XiveFabric *xfb, uint8_t format,
uint8_t nvt_blk, uint32_t nvt_idx,
bool cam_ignore, uint8_t priority,
uint32_t logic_serv, XiveTCTXMatch *match);
-} XiveFabricClass;
+};
/*
* XIVE END ESBs
*/
#define TYPE_XIVE_END_SOURCE "xive-end-source"
+typedef struct XiveENDSource XiveENDSource;
#define XIVE_END_SOURCE(obj) \
OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE)
-typedef struct XiveENDSource {
+struct XiveENDSource {
DeviceState parent;
uint32_t nr_ends;
@@ -448,7 +457,7 @@ typedef struct XiveENDSource {
MemoryRegion esb_mmio;
XiveRouter *xrtr;
-} XiveENDSource;
+};
/*
* For legacy compatibility, the exceptions define up to 256 different