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| author | Frederic Barrat <fbarrat@linux.ibm.com> | 2023-06-01 14:13:30 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-06-10 10:19:24 -0300 |
| commit | afca92071fc12402a8dee1ad68f66f22dd4b9872 (patch) | |
| tree | e959bb3fb245ef03a031ef16f44a5eef66b499e2 /include/hw/ppc | |
| parent | f0fc1c29a8163ce383d3bcb3aac0964747d2d8b1 (diff) | |
| download | qemu-afca92071fc12402a8dee1ad68f66f22dd4b9872.zip qemu-afca92071fc12402a8dee1ad68f66f22dd4b9872.tar.gz qemu-afca92071fc12402a8dee1ad68f66f22dd4b9872.tar.bz2 | |
pnv/xive2: Introduce macros to manipulate TIMA addresses
TIMA addresses are somewhat special and are split in several bit
fields with different meanings. This patch describes it and introduce
macros to more easily access the various fields.
Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20230601121331.487207-5-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/xive_regs.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index b7fde23..4a3c9ba 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -48,6 +48,22 @@ #define TM_SHIFT 16 +/* + * TIMA addresses are 12-bits (4k page). + * The MSB indicates a special op with side effect, which can be + * refined with bit 10 (see below). + * The registers, logically grouped in 4 rings (a quad-word each), are + * defined on the 6 LSBs (offset below 0x40) + * In between, we can add a cache line index from 0...3 (ie, 0, 0x80, + * 0x100, 0x180) to select a specific snooper. Those 'snoop port + * address' bits should be dropped when processing the operations as + * they are all equivalent. + */ +#define TM_ADDRESS_MASK 0xC3F +#define TM_SPECIAL_OP 0x800 +#define TM_RING_OFFSET 0x30 +#define TM_REG_OFFSET 0x3F + /* TM register offsets */ #define TM_QW0_USER 0x000 /* All rings */ #define TM_QW1_OS 0x010 /* Ring 0..2 */ |