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authorFrederic Barrat <fbarrat@linux.ibm.com>2023-07-03 10:12:14 +0200
committerDaniel Henrique Barboza <danielhb413@gmail.com>2023-07-07 04:46:12 -0300
commita8da2e1424c2f716222582a4706117d2ca845fe1 (patch)
tree2483dca5829b7663e75bfd0447470ccc20a2b29f /include/hw/ppc
parent694d3cb2ef2d7355ddaf413614f325f17da9716b (diff)
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pnv/xive: Add property on xive sources to define PQ state on reset
The PQ state of a xive interrupt is always initialized to Q=1, which means the interrupt is disabled. Since a xive source can be embedded in many objects, this patch adds a property to allow that behavior to be refined if needed. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20230703081215.55252-2-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
-rw-r--r--include/hw/ppc/xive.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h
index 3dfb06e..9f580a2 100644
--- a/include/hw/ppc/xive.h
+++ b/include/hw/ppc/xive.h
@@ -187,6 +187,7 @@ struct XiveSource {
/* PQ bits and LSI assertion bit */
uint8_t *status;
+ uint8_t reset_pq; /* PQ state on reset */
/* ESB memory region */
uint64_t esb_flags;