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| author | Cédric Le Goater <clg@redhat.com> | 2023-09-18 11:17:17 +0200 |
|---|---|---|
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | 2023-09-18 07:25:28 -0300 |
| commit | 44fa20c92811a9b88b41b4882a7e948c2fe6bd08 (patch) | |
| tree | 8ed5368d12a8ab7d0e31179fd71f4c0602d549bb /include/hw/ppc | |
| parent | 527b23832930bd17338093725cb9b95203b60742 (diff) | |
| download | qemu-44fa20c92811a9b88b41b4882a7e948c2fe6bd08.zip qemu-44fa20c92811a9b88b41b4882a7e948c2fe6bd08.tar.gz qemu-44fa20c92811a9b88b41b4882a7e948c2fe6bd08.tar.bz2 | |
spapr: Remove support for NVIDIA V100 GPU with NVLink2
NVLink2 support was removed from the PPC PowerNV platform and VFIO in
Linux 5.13 with commits :
562d1e207d32 ("powerpc/powernv: remove the nvlink support")
b392a1989170 ("vfio/pci: remove vfio_pci_nvlink2")
This was 2.5 years ago. Do the same in QEMU with a revert of commit
ec132efaa81f ("spapr: Support NVIDIA V100 GPU with NVLink2"). Some
adjustements are required on the NUMA part.
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20230918091717.149950-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/spapr.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index f4bd204..fca60b4 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -103,11 +103,8 @@ typedef enum { #define FDT_MAX_SIZE 0x200000 -/* Max number of GPUs per system */ -#define NVGPU_MAX_NUM 6 - /* Max number of NUMA nodes */ -#define NUMA_NODES_MAX_NUM (MAX_NODES + NVGPU_MAX_NUM) +#define NUMA_NODES_MAX_NUM (MAX_NODES) /* * NUMA FORM1 macros. FORM1_DIST_REF_POINTS was taken from @@ -160,8 +157,7 @@ struct SpaprMachineClass { bool (*phb_placement)(SpaprMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio, hwaddr *mmio32, hwaddr *mmio64, - unsigned n_dma, uint32_t *liobns, hwaddr *nv2gpa, - hwaddr *nv2atsd, Error **errp); + unsigned n_dma, uint32_t *liobns, Error **errp); SpaprResizeHpt resize_hpt_default; SpaprCapabilities default_caps; SpaprIrq *irq; @@ -276,7 +272,6 @@ struct SpaprMachineState { bool cmd_line_caps[SPAPR_CAP_NUM]; SpaprCapabilities def, eff, mig; - unsigned gpu_numa_id; SpaprTpmProxy *tpm_proxy; uint32_t FORM1_assoc_array[NUMA_NODES_MAX_NUM][FORM1_NUMA_ASSOC_SIZE]; |