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| author | Cédric Le Goater <clg@kaod.org> | 2018-12-11 23:38:15 +0100 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-12-21 09:39:13 +1100 |
| commit | 1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855 (patch) | |
| tree | 161ed49c070a281d4f38e698bcde246fe44191c9 /include/hw/ppc | |
| parent | 6e21de4a50fa1caf163e12a6c90424b750119f96 (diff) | |
| download | qemu-1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855.zip qemu-1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855.tar.gz qemu-1a937ad7e7a1b4eef37c967cbaeeda5ec5b90855.tar.bz2 | |
spapr: allocate the interrupt thread context under the CPU core
Each interrupt mode has its own specific interrupt presenter object,
that we store under the CPU object, one for XICS and one for XIVE.
Extend the sPAPR IRQ backend with a new handler to support them both.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc')
| -rw-r--r-- | include/hw/ppc/spapr_irq.h | 2 | ||||
| -rw-r--r-- | include/hw/ppc/xive.h | 1 |
2 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index e51e9f0..13db042 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -41,6 +41,8 @@ typedef struct sPAPRIrq { void (*print_info)(sPAPRMachineState *spapr, Monitor *mon); void (*dt_populate)(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); + Object *(*cpu_intc_create)(sPAPRMachineState *spapr, Object *cpu, + Error **errp); } sPAPRIrq; extern sPAPRIrq spapr_irq_xics; diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 19309d1..18cd114 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -419,6 +419,7 @@ typedef struct XiveTCTX { extern const MemoryRegionOps xive_tm_ops; void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon); +Object *xive_tctx_create(Object *cpu, XiveRouter *xrtr, Error **errp); static inline uint32_t xive_nvt_cam_line(uint8_t nvt_blk, uint32_t nvt_idx) { |