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| author | Hao Wu <wuhaotsh@google.com> | 2020-10-23 14:06:34 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2020-10-27 11:10:01 +0000 |
| commit | 7d378ed6e3b4a26f4da887fcccc4c6f1db3dcd42 (patch) | |
| tree | 6770998f835720d3e7bc0879ad7a0705a9650cee /include/hw/misc | |
| parent | 2ac88848cb03605e2fae6a035650eea461218af2 (diff) | |
| download | qemu-7d378ed6e3b4a26f4da887fcccc4c6f1db3dcd42.zip qemu-7d378ed6e3b4a26f4da887fcccc4c6f1db3dcd42.tar.gz qemu-7d378ed6e3b4a26f4da887fcccc4c6f1db3dcd42.tar.bz2 | |
hw/timer: Adding watchdog for NPCM7XX Timer.
The watchdog is part of NPCM7XX's timer module. Its behavior is
controlled by the WTCR register in the timer.
When enabled, the watchdog issues an interrupt signal after a pre-set
amount of cycles, and issues a reset signal shortly after that.
Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Signed-off-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: deleted blank line at end of npcm_watchdog_timer-test.c]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/misc')
| -rw-r--r-- | include/hw/misc/npcm7xx_clk.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/misc/npcm7xx_clk.h b/include/hw/misc/npcm7xx_clk.h index cdcc9e8..2338fbb 100644 --- a/include/hw/misc/npcm7xx_clk.h +++ b/include/hw/misc/npcm7xx_clk.h @@ -31,6 +31,8 @@ */ #define NPCM7XX_CLK_NR_REGS (0x70 / sizeof(uint32_t)) +#define NPCM7XX_WATCHDOG_RESET_GPIO_IN "npcm7xx-clk-watchdog-reset-gpio-in" + typedef struct NPCM7xxCLKState { SysBusDevice parent; |