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| author | Eddie James <eajames@linux.ibm.com> | 2019-07-01 17:26:18 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-07-01 17:29:00 +0100 |
| commit | 118c82e7ff4bd3aeaeca31caa64fb95351531ac4 (patch) | |
| tree | fad596846a6f2c3aee751ba7380e92a87f1c30fc /include/hw/misc | |
| parent | aae7a18d475608b46a923899a6f3989f087e92fe (diff) | |
| download | qemu-118c82e7ff4bd3aeaeca31caa64fb95351531ac4.zip qemu-118c82e7ff4bd3aeaeca31caa64fb95351531ac4.tar.gz qemu-118c82e7ff4bd3aeaeca31caa64fb95351531ac4.tar.bz2 | |
hw/misc/aspeed_xdma: New device
The XDMA engine embedded in the Aspeed SOCs performs PCI DMA operations
between the SOC (acting as a BMC) and a host processor in a server.
The XDMA engine exists on the AST2400, AST2500, and AST2600 SOCs, so
enable it for all of those. Add trace events on the important register
writes in the XDMA engine.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190618165311.27066-21-clg@kaod.org
[clg: - changed title ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/misc')
| -rw-r--r-- | include/hw/misc/aspeed_xdma.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/include/hw/misc/aspeed_xdma.h b/include/hw/misc/aspeed_xdma.h new file mode 100644 index 0000000..00b45d9 --- /dev/null +++ b/include/hw/misc/aspeed_xdma.h @@ -0,0 +1,30 @@ +/* + * ASPEED XDMA Controller + * Eddie James <eajames@linux.ibm.com> + * + * Copyright (C) 2019 IBM Corp. + * SPDX-License-Identifer: GPL-2.0-or-later + */ + +#ifndef ASPEED_XDMA_H +#define ASPEED_XDMA_H + +#include "hw/sysbus.h" + +#define TYPE_ASPEED_XDMA "aspeed.xdma" +#define ASPEED_XDMA(obj) OBJECT_CHECK(AspeedXDMAState, (obj), TYPE_ASPEED_XDMA) + +#define ASPEED_XDMA_NUM_REGS (ASPEED_XDMA_REG_SIZE / sizeof(uint32_t)) +#define ASPEED_XDMA_REG_SIZE 0x7C + +typedef struct AspeedXDMAState { + SysBusDevice parent; + + MemoryRegion iomem; + qemu_irq irq; + + char bmc_cmdq_readp_set; + uint32_t regs[ASPEED_XDMA_NUM_REGS]; +} AspeedXDMAState; + +#endif /* ASPEED_XDMA_H */ |