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| author | John Snow <jsnow@redhat.com> | 2020-07-24 01:22:56 -0400 |
|---|---|---|
| committer | John Snow <jsnow@redhat.com> | 2020-10-01 13:04:16 -0400 |
| commit | be8c9423dec7bd0a0af7f57ecbbcb2718db72555 (patch) | |
| tree | f23794815c661ccc27ee8edd5de1afc7500c2bf5 /include/hw/ide | |
| parent | f14bc040b073257f0eb8200042634c0d15f59ea7 (diff) | |
| download | qemu-be8c9423dec7bd0a0af7f57ecbbcb2718db72555.zip qemu-be8c9423dec7bd0a0af7f57ecbbcb2718db72555.tar.gz qemu-be8c9423dec7bd0a0af7f57ecbbcb2718db72555.tar.bz2 | |
ide: model HOB correctly
I have been staring at this FIXME for years and I never knew what it
meant. I finally stumbled across it!
When writing to the command registers, the old value is shifted into a
HOB copy of the register and the new value is written into the primary
register. When reading registers, the value retrieved is dependent on
the HOB bit in the CONTROL register.
By setting bit 7 (0x80) in CONTROL, any register read will, if it has
one, yield the HOB value for that register instead.
Our code has a problem: We were using bit 7 of the DEVICE register to
model this. We use bus->cmd roughly as the control register already, as
it stores the value from ide_ctrl_write.
Lastly, all command register writes reset the HOB, so fix that, too.
Signed-off-by: John Snow <jsnow@redhat.com>
Diffstat (limited to 'include/hw/ide')
| -rw-r--r-- | include/hw/ide/internal.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h index a23bb2f..5b7b0e4 100644 --- a/include/hw/ide/internal.h +++ b/include/hw/ide/internal.h @@ -58,6 +58,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(IDEBus, IDE_BUS) #define TAG_MASK 0xf8 /* Bits of Device Control register */ +#define IDE_CTRL_HOB 0x80 #define IDE_CTRL_RESET 0x04 #define IDE_CTRL_DISABLE_IRQ 0x02 |