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| author | Rashmica Gupta <rashmica.g@gmail.com> | 2019-09-04 09:04:58 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-09-13 16:05:00 +0100 |
| commit | fdcc7c0631144933e955b6ddbbd10325abc7f688 (patch) | |
| tree | fdf1f4a0f978709755e44f7ef8ec8d5d575585e8 /include/hw/arm | |
| parent | 4b7f956862dc2db4c5c60762abcb3b6179751cc6 (diff) | |
| download | qemu-fdcc7c0631144933e955b6ddbbd10325abc7f688.zip qemu-fdcc7c0631144933e955b6ddbbd10325abc7f688.tar.gz qemu-fdcc7c0631144933e955b6ddbbd10325abc7f688.tar.bz2 | |
aspeed: add a GPIO controller to the SoC
Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190904070506.1052-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/arm')
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 976fd6b..a56effe 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -23,6 +23,7 @@ #include "hw/watchdog/wdt_aspeed.h" #include "hw/net/ftgmac100.h" #include "target/arm/cpu.h" +#include "hw/gpio/aspeed_gpio.h" #define ASPEED_SPIS_NUM 2 #define ASPEED_WDTS_NUM 3 @@ -48,6 +49,7 @@ typedef struct AspeedSoCState { AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; + AspeedGPIOState gpio; } AspeedSoCState; #define TYPE_ASPEED_SOC "aspeed-soc" @@ -61,6 +63,7 @@ typedef struct AspeedSoCInfo { int spis_num; const char *fmc_typename; const char **spi_typename; + const char *gpio_typename; int wdts_num; const int *irqmap; const hwaddr *memmap; |