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| author | BALATON Zoltan <balaton@eik.bme.hu> | 2024-05-13 01:28:02 +0200 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-05-24 09:43:11 +1000 |
| commit | 5fd257f5994335c9446b0fa8b6cfd6102c2f74ca (patch) | |
| tree | b29107da6244b330e4d9f248b62ef7d92821a19f /hw | |
| parent | 306b5320307d13e95e1d43b585879cb56b163f66 (diff) | |
| download | qemu-5fd257f5994335c9446b0fa8b6cfd6102c2f74ca.zip qemu-5fd257f5994335c9446b0fa8b6cfd6102c2f74ca.tar.gz qemu-5fd257f5994335c9446b0fa8b6cfd6102c2f74ca.tar.bz2 | |
target/ppc: Remove id_tlbs flag from CPU env
This flag for split instruction/data TLBs is only set for 6xx soft TLB
MMU model and not used otherwise so no need to have a separate flag
for that.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ppc/pegasos2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index c22e8b3..c1bd8df 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -985,7 +985,7 @@ static void *build_fdt(MachineState *machine, int *fdt_size) cpu->env.icache_line_size); qemu_fdt_setprop_cell(fdt, cp, "i-cache-line-size", cpu->env.icache_line_size); - if (cpu->env.id_tlbs) { + if (ppc_is_split_tlb(cpu)) { qemu_fdt_setprop_cell(fdt, cp, "i-tlb-sets", cpu->env.nb_ways); qemu_fdt_setprop_cell(fdt, cp, "i-tlb-size", cpu->env.tlb_per_way); qemu_fdt_setprop_cell(fdt, cp, "d-tlb-sets", cpu->env.nb_ways); |