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author | Tong Ho <tong.ho@amd.com> | 2023-04-26 14:16:07 -0700 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2023-07-17 11:05:52 +0100 |
commit | c2c1c4a35c7c2b1a4140b0942b9797c857e476a4 (patch) | |
tree | 83c0c79893044cb23d374180c3fee16195fc95df /hw | |
parent | e60a7d0d4d89c8bca8a74a877e31abce50e848e3 (diff) | |
download | qemu-c2c1c4a35c7c2b1a4140b0942b9797c857e476a4.zip qemu-c2c1c4a35c7c2b1a4140b0942b9797c857e476a4.tar.gz qemu-c2c1c4a35c7c2b1a4140b0942b9797c857e476a4.tar.bz2 |
hw/nvram: Avoid unnecessary Xilinx eFuse backstore write
Add a check in the bit-set operation to write the backstore
only if the affected bit is 0 before.
With this in place, there will be no need for callers to
do the checking in order to avoid unnecessary writes.
Signed-off-by: Tong Ho <tong.ho@amd.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/nvram/xlnx-efuse.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c index fdfffaa..655c40b 100644 --- a/hw/nvram/xlnx-efuse.c +++ b/hw/nvram/xlnx-efuse.c @@ -143,6 +143,8 @@ static bool efuse_ro_bits_find(XlnxEFuse *s, uint32_t k) bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit) { + uint32_t set, *row; + if (efuse_ro_bits_find(s, bit)) { g_autofree char *path = object_get_canonical_path(OBJECT(s)); @@ -152,8 +154,13 @@ bool xlnx_efuse_set_bit(XlnxEFuse *s, unsigned int bit) return false; } - s->fuse32[bit / 32] |= 1 << (bit % 32); - efuse_bdrv_sync(s, bit); + /* Avoid back-end write unless there is a real update */ + row = &s->fuse32[bit / 32]; + set = 1 << (bit % 32); + if (!(set & *row)) { + *row |= set; + efuse_bdrv_sync(s, bit); + } return true; } |