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| author | Glenn Miles <milesg@linux.vnet.ibm.com> | 2023-11-14 13:56:55 -0600 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2023-11-21 08:39:58 +0100 |
| commit | b664466d8f3c7b448fc7e9bd50d03a36538c6c27 (patch) | |
| tree | cac5e27b6293f8720925a85c710487f43a666177 /hw | |
| parent | 47dfdd238dd0cc3c4834668fdd79ac5db85699f6 (diff) | |
| download | qemu-b664466d8f3c7b448fc7e9bd50d03a36538c6c27.zip qemu-b664466d8f3c7b448fc7e9bd50d03a36538c6c27.tar.gz qemu-b664466d8f3c7b448fc7e9bd50d03a36538c6c27.tar.bz2 | |
ppc/pnv: Fix PNV I2C invalid status after reset
The PNV I2C Controller was clearing the status register
after a reset without repopulating the "upper threshold
for I2C ports", "Command Complete" and the SCL/SDA input
level fields.
Fixed this for resets caused by a system reset as well
as from writing to the "Immediate Reset" register.
Fixes: 263b81ee15af ("ppc/pnv: Add an I2C controller model")
Signed-off-by: Glenn Miles <milesg@linux.vnet.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/ppc/pnv_i2c.c | 42 |
1 files changed, 18 insertions, 24 deletions
diff --git a/hw/ppc/pnv_i2c.c b/hw/ppc/pnv_i2c.c index 384442f..656a48e 100644 --- a/hw/ppc/pnv_i2c.c +++ b/hw/ppc/pnv_i2c.c @@ -463,6 +463,23 @@ static uint64_t pnv_i2c_xscom_read(void *opaque, hwaddr addr, return val; } +static void pnv_i2c_reset(void *dev) +{ + PnvI2C *i2c = PNV_I2C(dev); + + memset(i2c->regs, 0, sizeof(i2c->regs)); + + i2c->regs[I2C_STAT_REG] = + SETFIELD(I2C_STAT_UPPER_THRS, 0ull, i2c->num_busses - 1) | + I2C_STAT_CMD_COMP | I2C_STAT_SCL_INPUT_LEVEL | + I2C_STAT_SDA_INPUT_LEVEL; + i2c->regs[I2C_EXTD_STAT_REG] = + SETFIELD(I2C_EXTD_STAT_FIFO_SIZE, 0ull, PNV_I2C_FIFO_SIZE) | + SETFIELD(I2C_EXTD_STAT_I2C_VERSION, 0ull, 23); /* last version */ + + fifo8_reset(&i2c->fifo); +} + static void pnv_i2c_xscom_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { @@ -500,16 +517,7 @@ static void pnv_i2c_xscom_write(void *opaque, hwaddr addr, break; case I2C_RESET_I2C_REG: - i2c->regs[I2C_MODE_REG] = 0; - i2c->regs[I2C_CMD_REG] = 0; - i2c->regs[I2C_WATERMARK_REG] = 0; - i2c->regs[I2C_INTR_MASK_REG] = 0; - i2c->regs[I2C_INTR_COND_REG] = 0; - i2c->regs[I2C_INTR_RAW_COND_REG] = 0; - i2c->regs[I2C_STAT_REG] = 0; - i2c->regs[I2C_RESIDUAL_LEN_REG] = 0; - i2c->regs[I2C_EXTD_STAT_REG] &= - (I2C_EXTD_STAT_FIFO_SIZE | I2C_EXTD_STAT_I2C_VERSION); + pnv_i2c_reset(i2c); break; case I2C_RESET_ERRORS: @@ -621,20 +629,6 @@ static int pnv_i2c_dt_xscom(PnvXScomInterface *dev, void *fdt, return 0; } -static void pnv_i2c_reset(void *dev) -{ - PnvI2C *i2c = PNV_I2C(dev); - - memset(i2c->regs, 0, sizeof(i2c->regs)); - - i2c->regs[I2C_STAT_REG] = I2C_STAT_CMD_COMP; - i2c->regs[I2C_EXTD_STAT_REG] = - SETFIELD(I2C_EXTD_STAT_FIFO_SIZE, 0ull, PNV_I2C_FIFO_SIZE) | - SETFIELD(I2C_EXTD_STAT_I2C_VERSION, 0ull, 23); /* last version */ - - fifo8_reset(&i2c->fifo); -} - static void pnv_i2c_realize(DeviceState *dev, Error **errp) { PnvI2C *i2c = PNV_I2C(dev); |