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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-22 18:38:42 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-06-10 07:03:42 -0700 |
| commit | 5a7330b35cabc9e2fd3a8577b7004b63af8c57f3 (patch) | |
| tree | 337ddcc69d9c329bb93fa483313a63ce1b0ee3ed /hw | |
| parent | f5c7e93ad9880accbc6ecba3a77d7ac849c57eba (diff) | |
| download | qemu-5a7330b35cabc9e2fd3a8577b7004b63af8c57f3.zip qemu-5a7330b35cabc9e2fd3a8577b7004b63af8c57f3.tar.gz qemu-5a7330b35cabc9e2fd3a8577b7004b63af8c57f3.tar.bz2 | |
target/mips: Use env_cpu, env_archcpu
Cleanup in the boilerplate that each target must define.
Replace mips_env_get_cpu with env_archcpu. The combination
CPU(mips_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/intc/mips_gic.c | 2 | ||||
| -rw-r--r-- | hw/mips/mips_int.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c index 15e6e40..8f50949 100644 --- a/hw/intc/mips_gic.c +++ b/hw/intc/mips_gic.c @@ -44,7 +44,7 @@ static void mips_gic_set_vp_irq(MIPSGICState *gic, int vp, int pin) GIC_VP_MASK_CMP_SHF; } if (kvm_enabled()) { - kvm_mips_set_ipi_interrupt(mips_env_get_cpu(gic->vps[vp].env), + kvm_mips_set_ipi_interrupt(env_archcpu(gic->vps[vp].env), pin + GIC_CPU_PIN_OFFSET, ored_level); } else { diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 5ddeb15..f899f6c 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -76,7 +76,7 @@ void cpu_mips_irq_init_cpu(MIPSCPU *cpu) qemu_irq *qi; int i; - qi = qemu_allocate_irqs(cpu_mips_irq_request, mips_env_get_cpu(env), 8); + qi = qemu_allocate_irqs(cpu_mips_irq_request, env_archcpu(env), 8); for (i = 0; i < 8; i++) { env->irq[i] = qi[i]; } |