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| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-06-11 10:59:55 +1000 |
|---|---|---|
| committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2013-06-18 09:45:00 +0200 |
| commit | fa96d6142f7f1947717c7c45c4d3141e5ab55167 (patch) | |
| tree | 8593a42aeae04b8a9290aebbfd14eef16f76954d /hw | |
| parent | 45fdd3bf5a00466cb0f762c638291a5446773dc9 (diff) | |
| download | qemu-fa96d6142f7f1947717c7c45c4d3141e5ab55167.zip qemu-fa96d6142f7f1947717c7c45c4d3141e5ab55167.tar.gz qemu-fa96d6142f7f1947717c7c45c4d3141e5ab55167.tar.bz2 | |
intc/xilinx_intc: Inhibit write to ISR when HIE
When the Hardware Interrupt Enable (HIE) bit is set, software cannot
change ISR. Add write guard accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/intc/xilinx_intc.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c index 09b4453..ddedfa3 100644 --- a/hw/intc/xilinx_intc.c +++ b/hw/intc/xilinx_intc.c @@ -116,6 +116,11 @@ pic_write(void *opaque, hwaddr addr, case R_CIE: p->regs[R_IER] &= ~value; /* Atomic clear ie. */ break; + case R_ISR: + if ((p->regs[R_MER] & 2)) { + break; + } + /* fallthrough */ default: if (addr < ARRAY_SIZE(p->regs)) p->regs[addr] = value; |