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author | Peter Maydell <peter.maydell@linaro.org> | 2020-09-18 13:36:42 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-09-18 13:36:42 +0100 |
commit | e883b492c221241d28aaa322c61536436090538a (patch) | |
tree | e70915cab4b0fee65482e2abc294c0d97365e296 /hw | |
parent | 17cd6e2bbffa740ee44b9b651e70d56175c17e03 (diff) | |
parent | 204dab83fe00a3e0781d93ad7899192a9409e987 (diff) | |
download | qemu-e883b492c221241d28aaa322c61536436090538a.zip qemu-e883b492c221241d28aaa322c61536436090538a.tar.gz qemu-e883b492c221241d28aaa322c61536436090538a.tar.bz2 |
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20200918' into staging
Aspeed patches :
* Couple of cleanups
* New machine properties to define the flash models
# gpg: Signature made Fri 18 Sep 2020 08:23:19 BST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20200918:
misc: aspeed_scu: Update AST2600 silicon id register
hw/arm/aspeed: Add machine properties to define the flash models
hw/arm/aspeed: Map the UART5 device unconditionally
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/arm/aspeed.c | 45 | ||||
-rw-r--r-- | hw/arm/aspeed_ast2600.c | 8 | ||||
-rw-r--r-- | hw/arm/aspeed_soc.c | 8 | ||||
-rw-r--r-- | hw/misc/aspeed_scu.c | 7 |
4 files changed, 55 insertions, 13 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 8bfb1c7..bdb981d 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -41,6 +41,8 @@ struct AspeedMachineState { MemoryRegion ram_container; MemoryRegion max_ram; bool mmio_exec; + char *fmc_model; + char *spi_model; }; /* Palmetto hardware value: 0x120CE416 */ @@ -332,8 +334,10 @@ static void aspeed_machine_init(MachineState *machine) "max_ram", max_ram_size - ram_size); memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram); - aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model); - aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model); + aspeed_board_init_flashes(&bmc->soc.fmc, bmc->fmc_model ? + bmc->fmc_model : amc->fmc_model); + aspeed_board_init_flashes(&bmc->soc.spi[0], bmc->spi_model ? + bmc->spi_model : amc->spi_model); /* Install first FMC flash content as a boot rom. */ if (drive0) { @@ -570,6 +574,34 @@ static void aspeed_machine_instance_init(Object *obj) ASPEED_MACHINE(obj)->mmio_exec = false; } +static char *aspeed_get_fmc_model(Object *obj, Error **errp) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(obj); + return g_strdup(bmc->fmc_model); +} + +static void aspeed_set_fmc_model(Object *obj, const char *value, Error **errp) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(obj); + + g_free(bmc->fmc_model); + bmc->fmc_model = g_strdup(value); +} + +static char *aspeed_get_spi_model(Object *obj, Error **errp) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(obj); + return g_strdup(bmc->spi_model); +} + +static void aspeed_set_spi_model(Object *obj, const char *value, Error **errp) +{ + AspeedMachineState *bmc = ASPEED_MACHINE(obj); + + g_free(bmc->spi_model); + bmc->spi_model = g_strdup(value); +} + static void aspeed_machine_class_props_init(ObjectClass *oc) { object_class_property_add_bool(oc, "execute-in-place", @@ -577,6 +609,15 @@ static void aspeed_machine_class_props_init(ObjectClass *oc) aspeed_set_mmio_exec); object_class_property_set_description(oc, "execute-in-place", "boot directly from CE0 flash device"); + + object_class_property_add_str(oc, "fmc-model", aspeed_get_fmc_model, + aspeed_set_fmc_model); + object_class_property_set_description(oc, "fmc-model", + "Change the FMC Flash model"); + object_class_property_add_str(oc, "spi-model", aspeed_get_spi_model, + aspeed_set_spi_model); + object_class_property_set_description(oc, "spi-model", + "Change the SPI Flash model"); } static int aspeed_soc_num_cpus(const char *soc_name) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 9d95e42..1450bde 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) } /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 35be126..7eefd54 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) } /* UART - attach an 8250 to the IO space as our UART5 */ - if (serial_hd(0)) { - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5); - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2, + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400, + serial_hd(0), DEVICE_LITTLE_ENDIAN); /* I2C */ object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr), diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index dc6dd87..40a38eb 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -670,7 +670,12 @@ static void aspeed_ast2600_scu_reset(DeviceState *dev) memcpy(s->regs, asc->resets, asc->nr_regs * 4); - s->regs[AST2600_SILICON_REV] = s->silicon_rev; + /* + * A0 reports A0 in _REV, but subsequent revisions report A1 regardless + * of actual revision. QEMU and Linux only support A1 onwards so this is + * sufficient. + */ + s->regs[AST2600_SILICON_REV] = AST2600_A1_SILICON_REV; s->regs[AST2600_SILICON_REV2] = s->silicon_rev; s->regs[AST2600_HW_STRAP1] = s->hw_strap1; s->regs[AST2600_HW_STRAP2] = s->hw_strap2; |