diff options
| author | Eduardo Habkost <ehabkost@redhat.com> | 2020-08-25 15:20:48 -0400 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2020-09-02 07:29:25 -0400 |
| commit | 38688fdbe9c5db9ca5ed22f9f6881ab444abcb1d (patch) | |
| tree | 213113dc2a7e0420cdcb49f4e3e5b828a8bb330e /hw | |
| parent | 37e3d65043229bb20bd07af74dc0866e12071415 (diff) | |
| download | qemu-38688fdbe9c5db9ca5ed22f9f6881ab444abcb1d.zip qemu-38688fdbe9c5db9ca5ed22f9f6881ab444abcb1d.tar.gz qemu-38688fdbe9c5db9ca5ed22f9f6881ab444abcb1d.tar.bz2 | |
rx: Rename QOM type check macros
Currently we have a RXCPU typedef and a RXCPU type checking
macro, but OBJECT_DECLARE* would transform the RXCPU macro into a
function, and the function name would conflict with the typedef
name.
Rename the RXCPU* QOM type check macros to RX_CPU*, so we will
avoid the conflict and make the macro names consistent with the
TYPE_RX_CPU constant name.
This will make future conversion to OBJECT_DECLARE* easier.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20200825192110.3528606-53-ehabkost@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/rx/rx-gdbsim.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c index 54992eb..6914de2 100644 --- a/hw/rx/rx-gdbsim.c +++ b/hw/rx/rx-gdbsim.c @@ -118,7 +118,7 @@ static void rx_gdbsim_init(MachineState *machine) * the latter half of the SDRAM space. */ kernel_offset = machine->ram_size / 2; - rx_load_image(RXCPU(first_cpu), kernel_filename, + rx_load_image(RX_CPU(first_cpu), kernel_filename, SDRAM_BASE + kernel_offset, kernel_offset); if (dtb_filename) { ram_addr_t dtb_offset; @@ -141,7 +141,7 @@ static void rx_gdbsim_init(MachineState *machine) rom_add_blob_fixed("dtb", dtb, dtb_size, SDRAM_BASE + dtb_offset); /* Set dtb address to R1 */ - RXCPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset; + RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset; } } } |