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| author | Jae Hyun Yoo <quic_jaehyoo@quicinc.com> | 2022-06-30 09:21:13 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-06-30 09:21:13 +0200 |
| commit | 2a7a5d5cc40d736eb11baef43bd7ee2ebcb5582c (patch) | |
| tree | 15292ca9bc69858aaaece994a41bb709cb11b12a /hw | |
| parent | cfc68f163992fe175d9ea58c247d1a7210613a66 (diff) | |
| download | qemu-2a7a5d5cc40d736eb11baef43bd7ee2ebcb5582c.zip qemu-2a7a5d5cc40d736eb11baef43bd7ee2ebcb5582c.tar.gz qemu-2a7a5d5cc40d736eb11baef43bd7ee2ebcb5582c.tar.bz2 | |
hw/arm/aspeed: firework: add I2C MUXes for VR channels
Add 2-level cascaded I2C MUXes for SOC VR channels into the Firework
machine.
Signed-off-by: Jae Hyun Yoo <quic_jaehyoo@quicinc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220627154703.148943-8-quic_jaehyoo@quicinc.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/arm/aspeed.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index e8c565c..6fe9b13 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -965,13 +965,21 @@ static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc) static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc) { AspeedSoCState *soc = &bmc->soc; - I2CSlave *therm_mux; + I2CSlave *therm_mux, *cpuvr_mux; /* Create the generic DC-SCM hardware */ qcom_dc_scm_bmc_i2c_init(bmc); /* Now create the Firework specific hardware */ + /* I2C7 CPUVR MUX */ + cpuvr_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 7), + "pca9546", 0x70); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 0), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 1), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 2), "pca9548", 0x72); + i2c_slave_create_simple(pca954x_i2c_get_bus(cpuvr_mux, 3), "pca9548", 0x72); + /* I2C8 Thermal Diodes*/ therm_mux = i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 8), "pca9548", 0x70); |