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authorPeter Maydell <peter.maydell@linaro.org>2021-06-29 10:02:42 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-29 10:02:42 +0100
commit13d5f87cc3b94bfccc501142df4a7b12fee3a6e7 (patch)
tree0f357abe9ec02c6dcfd374f5c027dac6ee417b7e /hw
parent6512fa497c2fa9751b9d774ab32d87a9764d1958 (diff)
parent9d14a0428012b0bb7969aec512f2357247a86236 (diff)
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Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-axp-20210628' into staging
Fixes for NetBSD/alpha: - Provide a proper PCI-ISA bridge - Set PCI device IDs correctly - Pass -nographic flag to PALcode - Update PALcode to set up the Console Terminal Block - Honor the Floating-point ENable bit during translate. # gpg: Signature made Mon 28 Jun 2021 15:34:08 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-axp-20210628: target/alpha: Honor the FEN bit pc-bios: Update the palcode-clipper image hw/alpha: Provide a PCI-ISA bridge device node hw/alpha: Provide console information to the PALcode at start-up hw/alpha: Set minimum PCI device ID to 1 to match Clipper IRQ mappings Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r--hw/alpha/Kconfig4
-rw-r--r--hw/alpha/alpha_sys.h4
-rw-r--r--hw/alpha/dp264.c59
-rw-r--r--hw/alpha/typhoon.c20
4 files changed, 55 insertions, 32 deletions
diff --git a/hw/alpha/Kconfig b/hw/alpha/Kconfig
index 15c59ff..9af650c 100644
--- a/hw/alpha/Kconfig
+++ b/hw/alpha/Kconfig
@@ -3,9 +3,7 @@ config DP264
imply PCI_DEVICES
imply TEST_DEVICES
imply E1000_PCI
- select I82374
- select I8254
- select I8259
+ select I82378
select IDE_CMD646
select MC146818RTC
select PCI
diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h
index e2c02e2..2263e82 100644
--- a/hw/alpha/alpha_sys.h
+++ b/hw/alpha/alpha_sys.h
@@ -10,8 +10,8 @@
#include "hw/intc/i8259.h"
-PCIBus *typhoon_init(MemoryRegion *, ISABus **, qemu_irq *, AlphaCPU *[4],
- pci_map_irq_fn);
+PCIBus *typhoon_init(MemoryRegion *, qemu_irq *, qemu_irq *, AlphaCPU *[4],
+ pci_map_irq_fn, uint8_t devfn_min);
/* alpha_pci.c. */
extern const MemoryRegionOps alpha_pci_ignore_ops;
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 1017ecf..c78ed96 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -15,9 +15,7 @@
#include "qemu/error-report.h"
#include "hw/rtc/mc146818rtc.h"
#include "hw/ide/pci.h"
-#include "hw/timer/i8254.h"
#include "hw/isa/superio.h"
-#include "hw/dma/i8257.h"
#include "net/net.h"
#include "qemu/cutils.h"
#include "qemu/datadir.h"
@@ -58,8 +56,10 @@ static void clipper_init(MachineState *machine)
AlphaCPU *cpus[4];
PCIBus *pci_bus;
PCIDevice *pci_dev;
+ DeviceState *i82378_dev;
ISABus *isa_bus;
qemu_irq rtc_irq;
+ qemu_irq isa_irq;
long size, i;
char *palcode_filename;
uint64_t palcode_entry;
@@ -72,19 +72,57 @@ static void clipper_init(MachineState *machine)
cpus[i] = ALPHA_CPU(cpu_create(machine->cpu_type));
}
+ /*
+ * arg0 -> memory size
+ * arg1 -> kernel entry point
+ * arg2 -> config word
+ *
+ * Config word: bits 0-5 -> ncpus
+ * bit 6 -> nographics option (for HWRPB CTB)
+ *
+ * See init_hwrpb() in the PALcode.
+ */
cpus[0]->env.trap_arg0 = ram_size;
cpus[0]->env.trap_arg1 = 0;
- cpus[0]->env.trap_arg2 = smp_cpus;
-
- /* Init the chipset. */
- pci_bus = typhoon_init(machine->ram, &isa_bus, &rtc_irq, cpus,
- clipper_pci_map_irq);
+ cpus[0]->env.trap_arg2 = smp_cpus | (!machine->enable_graphics << 6);
+
+ /*
+ * Init the chipset. Because we're using CLIPPER IRQ mappings,
+ * the minimum PCI device IdSel is 1.
+ */
+ pci_bus = typhoon_init(machine->ram, &isa_irq, &rtc_irq, cpus,
+ clipper_pci_map_irq, PCI_DEVFN(1, 0));
+
+ /*
+ * Init the PCI -> ISA bridge.
+ *
+ * Technically, PCI-based Alphas shipped with one of three different
+ * PCI-ISA bridges:
+ *
+ * - Intel i82378 SIO
+ * - Cypress CY82c693UB
+ * - ALI M1533
+ *
+ * (An Intel i82375 PCI-EISA bridge was also used on some models.)
+ *
+ * For simplicity, we model an i82378 here, even though it wouldn't
+ * have been on any Tsunami/Typhoon systems; it's close enough, and
+ * we don't want to deal with modelling the CY82c693UB (which has
+ * incompatible edge/level control registers, plus other peripherals
+ * like IDE and USB) or the M1533 (which also has IDE and USB).
+ *
+ * Importantly, we need to provide a PCI device node for it, otherwise
+ * some operating systems won't notice there's an ISA bus to configure.
+ */
+ i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(7, 0), "i82378"));
+ isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
+
+ /* Connect the ISA PIC to the Typhoon IRQ used for ISA interrupts. */
+ qdev_connect_gpio_out(i82378_dev, 0, isa_irq);
/* Since we have an SRM-compatible PALcode, use the SRM epoch. */
mc146818_rtc_init(isa_bus, 1900, rtc_irq);
- i8254_pit_init(isa_bus, 0x40, 0, NULL);
-
/* VGA setup. Don't bother loading the bios. */
pci_vga_init(pci_bus);
@@ -93,9 +131,6 @@ static void clipper_init(MachineState *machine)
pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
}
- /* 2 82C37 (dma) */
- isa_create_simple(isa_bus, "i82374");
-
/* Super I/O */
isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 87020cb..bd39c8c 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -814,8 +814,9 @@ static void typhoon_alarm_timer(void *opaque)
cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER);
}
-PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
- AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq)
+PCIBus *typhoon_init(MemoryRegion *ram, qemu_irq *p_isa_irq,
+ qemu_irq *p_rtc_irq, AlphaCPU *cpus[4],
+ pci_map_irq_fn sys_map_irq, uint8_t devfn_min)
{
MemoryRegion *addr_space = get_system_memory();
DeviceState *dev;
@@ -843,6 +844,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
}
}
+ *p_isa_irq = qemu_allocate_irq(typhoon_set_isa_irq, s, 0);
*p_rtc_irq = qemu_allocate_irq(typhoon_set_timer_irq, s, 0);
/* Main memory region, 0x00.0000.0000. Real hardware supports 32GB,
@@ -885,7 +887,7 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
b = pci_register_root_bus(dev, "pci",
typhoon_set_irq, sys_map_irq, s,
&s->pchip.reg_mem, &s->pchip.reg_io,
- 0, 64, TYPE_PCI_BUS);
+ devfn_min, 64, TYPE_PCI_BUS);
phb->bus = b;
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
@@ -918,18 +920,6 @@ PCIBus *typhoon_init(MemoryRegion *ram, ISABus **isa_bus, qemu_irq *p_rtc_irq,
/* Pchip1 PCI I/O, 0x802.FC00.0000, 32MB. */
/* Pchip1 PCI configuration, 0x802.FE00.0000, 16MB. */
- /* Init the ISA bus. */
- /* ??? Technically there should be a cy82c693ub pci-isa bridge. */
- {
- qemu_irq *isa_irqs;
-
- *isa_bus = isa_bus_new(NULL, get_system_memory(), &s->pchip.reg_io,
- &error_abort);
- isa_irqs = i8259_init(*isa_bus,
- qemu_allocate_irq(typhoon_set_isa_irq, s, 0));
- isa_bus_irqs(*isa_bus, isa_irqs);
- }
-
return b;
}