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| author | Julian Pidancet <julian.pidancet@gmail.com> | 2011-11-23 01:03:15 +0000 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> | 2011-11-23 10:36:59 +0000 |
| commit | 4abf12f4ea866779b493ecf4606bd0b6d35f8348 (patch) | |
| tree | a09261cf14241189edd0b5d9f7b0331fce9974ed /hw | |
| parent | e30e5eb6136aa3311dad4ca90f6546e05ae98f92 (diff) | |
| download | qemu-4abf12f4ea866779b493ecf4606bd0b6d35f8348.zip qemu-4abf12f4ea866779b493ecf4606bd0b6d35f8348.tar.gz qemu-4abf12f4ea866779b493ecf4606bd0b6d35f8348.tar.bz2 | |
rtl8139: Fix invalid IO access alignment
This patch makes iPXE work with the rtl8139 emulation. The rtl8139
driver in iPXE issues a 16bit access on the ChipCmd register
(offset 0x37) to check the status of the rx buffer. The offset of the
ioport access was getting fixed up to 0x36 in qemu, causing the value
read in iPXE to be invalid.
This fixes an issue with iPXE reporting timeouts during TFTP transfers.
Reposting this here because it is trivial enough and the original post
on qemu-devel didn't attract much attention.
Also, the inw() which was causing the issue has been replaced with an
inb() in upstream iPXE:
https://git.ipxe.org/ipxe.git/commit/91dd64ad25baa27954a7518e73df4fca8a2d0c93
Signed-off-by: Julian Pidancet <julian.pidancet@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/rtl8139.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/hw/rtl8139.c b/hw/rtl8139.c index 4c37993..aa8ed0a 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -1971,7 +1971,7 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) cplus_tx_ring_desc += 16 * descriptor; DPRINTF("+++ C+ mode reading TX descriptor %d from host memory at " - "%08x0x%08x = 0x"DMA_ADDR_FMT"\n", descriptor, s->TxAddr[1], + "%08x %08x = 0x"DMA_ADDR_FMT"\n", descriptor, s->TxAddr[1], s->TxAddr[0], cplus_tx_ring_desc); uint32_t val, txdw0,txdw1,txbufLO,txbufHI; @@ -2713,8 +2713,6 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val) { RTL8139State *s = opaque; - addr &= 0xff; - switch (addr) { case MAC0 ... MAC0+5: @@ -2800,8 +2798,6 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val) { RTL8139State *s = opaque; - addr &= 0xfe; - switch (addr) { case IntrMask: @@ -2900,8 +2896,6 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val) { RTL8139State *s = opaque; - addr &= 0xfc; - switch (addr) { case RxMissed: @@ -2969,8 +2963,6 @@ static uint32_t rtl8139_io_readb(void *opaque, uint8_t addr) RTL8139State *s = opaque; int ret; - addr &= 0xff; - switch (addr) { case MAC0 ... MAC0+5: @@ -3043,8 +3035,6 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr) RTL8139State *s = opaque; uint32_t ret; - addr &= 0xfe; /* mask lower bit */ - switch (addr) { case IntrMask: @@ -3120,8 +3110,6 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr) RTL8139State *s = opaque; uint32_t ret; - addr &= 0xfc; /* also mask low 2 bits */ - switch (addr) { case RxMissed: |